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Timer, Timer control register – Sundance SMT363XC2 User Manual

Page 16

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Version 2.2

Page 16 of 27

SMT363XC2 User Manual

Timer


The TIM TCLK0 and TCLK1 signals can be routed to the DSP’s TOUT/TINP pins.
The signal direction must be specified, together with the routing information in the
timer control register.

Timer Control Register

31–6 5

4

3–0

Reserved

TCLK1 TCLK0 Reserved

Field Description

0 TIM TCLK0 is an input

TCLK0

1 Enable TIM TCLK0 as an output

0 TIM TCLK1 is an input

TCLK1

1 Enable TIM TCLK1 as an output


If the TIM TCLKx pin is selected as an output, the DSP TOUTx signal will be used to
drive it. The TIM TCLKx pin will always drive the DSP TINPx input.


C6x




FPGA

TOUT0
TINP0

TCLK0EN

TCLK0

The Timer control register is described in the

SMT6400 help file

.