Sundance SMT363XC2 - Manual (Page 14)

Version 2.2 Page 14 of 27 SMT363XC2 User Manual
LED Setting
The SMT363XC2 has 8 LEDs.
LED D1 always displays the state of the FPGA DONE pin. This LED is off when the
FPGA is configured (DONE=1) and on when it is not configured (DONE=0).
This LED should go on when the board is first powered up and go off when the FPGA
has been successfully programmed (this is the standard operation of the boot code
resident in the flash memory device). If the LED does not light at power-on, check
that you have the mounting pillars and screws fitted properly. If it stays on, the DSP
is not booting correctly, or is set to boot in a non-standard way.
Two of the LEDs (D2-3) can be controlled with the LED register. Writing 1 will
illuminate the LED; writing 0 will turn it off.
LED Register
(0xB00D0000)
31–4 3 2 1 0
- -
LED
D3
LED
D2
RW,0 RW,1 RW,0 RW,0
Despite LED register bit 2 is writable; user should not change the value of this bit.
When SMT363XC2 embeds 16MB of SDRAM, the DSP is configured to access
SDRAM with 8 column address bits and 12 row address bits, whereas when
SMT363XC2 embeds 64MB SDRAM, it’s configured with 10 column address bits and
13 row address bits (EMIF SDRAM Control register).
It results that FPGA’s is moved in the DSP’s memory space.
Writing a value to this bit changes the way the FPGA decodes the address, and
therefore it's location in the EMIF memory space.
This bit should be set to ‘1’ when 64MB of SDRAM are fitted on-board; otherwise it
should be set to ‘0’ when 16MB of SDRAM are fitted on-board.