Sundance SMT326v2 - Manual (Page 12)

Release Page 12 of 24 SMT326 DSP PC/ISA System User Guide
Document Name: SMT326 Ugv2.doc Original Date: 08/11/97
Product Name: SMT326 Revision Date: 08/26/99
Author: Graeme Parker – Fabio Ancona
Connector Numbering
The DAC outputs are labelled as follows;-
Channel FPGA address FPGA address Channel
OUT0 80200010 80200018 OUT16
OUT1 80200000 80200008 OUT17
OUT2 80200011 80200019 OUT18
OUT3 80200001 80200009 OUT19
OUT4 80200012 8020001A OUT20
OUT5 80200002 8020000A OUT21
OUT6 80200013 8020001B OUT22
OUT7 80200003 8020000B OUT23
OUT8 80200014 8020001C OUT24
OUT9 80200004 8020000C OUT25
OUT10 80200015 8020001D OUT26
OUT11 80200005 8020000D OUT27
OUT12 80200016 8020001E OUT28
OUT13 80200006 8020000E OUT29
OUT14 80200017 8020001F OUT30
OUT15 80200007 8020000F OUT31
The DAC inputs are labelled as follows;-
Channel FPGA address FPGA address Channel
IN0 80200000 80200008 IN16
IN1 80200010 80200018 IN17
IN2 80200001 80200009 IN18
IN3 80200011 80200019 IN19
IN4 80200002 8020000A IN20
IN5 80200012 8020001A IN21
IN6 80200003 8020000B IN22
IN7 80200013 8020001B IN23
IN8 80200004 8020000C IN24
IN9 80200014 8020001C IN25
IN10 80200005 8020000D IN26
IN11 80200015 8020001D IN27
IN12 80200006 8020000E IN28
IN13 80200016 8020001E IN29
IN14 80200007 8020000F IN30
IN15 80200017 8020001F IN31