Sensoray 626 User Manual
Page 24
Sensoray Model 626 Instruction Manual
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10.10 Interrupts
10.10.1
Interrupts While Under Battery Backup
If there is a power failure while an external NiCad battery is connected and fully charged and the
‘Battery Enable’ bit of MISC2 was set, then when power is restored the interrupts are automatically
disabled. Any interrupts that occurred while the power was down will cause an interrupt the moment
interrupts are re-enabled.
10.10.2
Interrupt source Selection
If ‘Counter A (or B) Interrupt Source’=00 then no interrupt will occur. An index and/or an overflow can
still be captured but they will not generate an interrupt. The Misc2 register will have to be polled to see
if an index or overflow has occurred.
If ‘Counter A (or B) Interrupt Source’=01 an interrupt will occur when the counter overflows.
If ‘Counter A (or B) Interrupt Source’=10 an interrupt will occur when the counter receives an index
pulse.
When ‘Counter A (or B) Interrupt Source’=11 an interrupt will occur when the counter overflows or
receives an index.
10.10.3
Clearing An interrupt
There are 3 bits per counter pair that are used to clear the interrupts. . The ‘Select Interrupt A or B’ bits
(bit 13 & 14) are used to select which interrupts must be cleared. A ‘1’ in either register will allow it to
be cleared. Then writing a ‘1’ to the ‘Clear Interrupt’ will clear the interrupts selected with a ‘1’ in their
‘Select Interrupt A or B’ bit. If the ‘Clear Interrupt’ bit is clear it has no effect.
10.10.4
Counter Interrupt Handling
There is only one main interrupt to the system from the 626. Once this interrupt has been received it is
up to the user to determine whether it originated from the counters or the digital inputs.
The ‘Counter Overflow Interrupt’ flags (COINT) and the ‘Index interrupt’ flags (INDINT) of the
MISC2 register (See “Table 22 Read from MISC2 92 (hex)” P23) must be checked to determine which
counter & what event may have caused the interrupt. An interrupt must be cleared once it has been
handled to prevent it from causing multiple interrupts.