Sensoray 626 - Manual (Page 11)

Sensoray Model 626 Instruction Manual 9
9. Digital I/O
Figure 3 - Digital I/O Channels
9.1 Overview
The 626 board provides 48 digital I/O channels. 40 of these channels (Channels 0-39) offer edge
detection & interrupt on edge detection. Either a positive or negative edge can be detected. The other 8
channels (40-47) have simple input/output functionality only.
Each channel can function as an input or an output.
NOTE: Any channel that is to be used as an input must have a ‘0’ written to its output control register.
This ensures that the output transistor is turned off allowing the pull-up resistor to pull the
channel high. If this is not done the transistor will have to sink high currents if the input is
driven high externally.
Table 4 Digital I/O Register Offsets
Write Read
Offset
(Hex)
Register Description Offset
(Hex)
Register Description
40 Not used 40
42 WRINTSELA Interrupt Enable (0-15) 42
44 WREDGSELA Edge Selection (0-15) 44
46 WRCAPSELA Capture Enable (0-15) 46
DINA Status of digital inputs (0-15)
48 DOUTA Write to Digital Output (0-15) 48 RDCAPFLGA Edges captured so far (0-15)
4A 4A RDINTSELA Status of interrupt enable register A
4C Not used 4C RDEDGSELA Status of edge selection register A
4E 4E RDCAPSELA Status of capture enable register A
50 50
52 WRINTSELB Interrupt Enable (16-31) 52
54 WREDGSELB Edge Selection (16-31) 54
56 WRCAPSELB Capture Enable (16-31) 56
DINB Status of digital inputs (16-31)
58 DOUTB Write to Digital Output (16-31) 58 RDCAPFLGB Edges captured so far (16-31)
5A 5A RDINTSELB Status of interrupt enable register B
5C Not used 5C RDEDGSELB Status of edge selection register B
5E 5E RDCAPSELB Status of capture enable register B
60 60
62 WRINTSELC Interrupt Enable (32-47) 62
64 WREDGSELC Edge Selection (32-47) 64
66 WRCAPSELC Capture Enable (32-47) 66
DINC
Status of digital inputs (32-47)
68 DOUTC Write to Digital Output (32-47) 68 RDCAPFLGC Edges captured so far (32-47)
6A 6A RDINTSELC Status of interrupt enable register C
6C Not used 6C RDEDGSELC Status of edge selection register C
6E 6E RDCAPSELC Status of capture enable register C
Edge
Capture
&
I/O Register
Interru
pts
1
48
In
Out
In
Out
Digital I/O
PCI Bus Interfa
ce &
Control Logic