Measurement Computing USB-4302 - Manual (Page 17)

USB-4302 User's Guide Functional Details
17
Source Description
GATE3 Counter 3 gate pin
GATE4 Counter 4 gate pin
GATE5 Counter 5 gate pin
FREQ1 Internal base frequency
FREQ2 Internal base frequency/10
FREQ3 Internal base frequency/100
FREQ4 Internal base frequency/1000
FREQ5 Internal base frequency/10,000
Divider
The signal output from the OSC OUT pin is the same frequency as the frequency source divided by a value from
1 to 16. For example, if you select a base frequency of 5.0000 MHz in InstaCal, and choose FREQ3 as the
internal frequency source (50.000 kHz from the Internal frequency values table on page 16), and 8 as the
oscillator divider, the frequency of the signal at the OSC OUT pin is (50.000 kHz / 8) = 6.2500 kHz.
Counter operation
Each of the five counters performs essentially the same function: their internal value either increments or
decrements on each rising or falling edge of their source signal. Since they are all 16-bit counters, they can
count up from 0 to 2 16 -1 = 65,535, or down from 65,535 to 0. When counting up, 65,535 is considered to be the
Terminal Count (TC); when counting down, 0 is the TC. There are a variety of configuration options that can
be used to unlock the power of this basic functionality.
Count source
Each counter on the device can count from any of the available sources. The sources for counting are the same
five internal sources and ten external sources listed in the Oscillator sources table (on page 16) with one
addition — each counter can also increment whenever the previous numbered counter reaches its TC (TC n-1).
For example, if you select TC n-1 as the counter source for Counter 2 Input ( CTR2IN ), counter 2 increments or
decrements when counter 1 reaches TC. The previous numbered counter for counter 1 is counter 5. Note that
any of the 16 sources is available for any of the five counters. In other words, the signal source for counter 3 can
be Counter 5 Input or Counter 2 Gate, or FREQ4, and so on.
Gate control
The counter can be gated in several ways. Level gating typically allows the counter to count only while the gate
is active. Edge gating, on the other hand, typically starts the counting when an active gate edge is received.

Level gating configuration options are active high level Gate n, active low level Gate n, active high level
Gate n-1 and active high level Gate n+1, where Gate n is the Gate pin associated with the counter being
configured.
 Edge gating configuration options are active high (rising edge) Gate n and active low (falling edge) Gate n.
The counter can be gated by the TC of the previous numbered counter. You can also disable gating.