Measurement Computing PCI-DUAL-AC5 - Manual (Page 14)

PCI-DUAL-AC5 User's Guide Functional Details
14
PCI-DUAL-AC5 to SSR-PB24 rack connections
The PCI-DUAL-AC5 board provides 48 bits of digital I/O. However, most popular relay and SSR boards
provide 24-bits of I/O. The PCI-DUAL-AC5 uses a dual-leg cable, C100FE-x to monitor and control SSRs on
two SSR-PB24 racks. The configuration is shown in Figure 3.
SSR-PB24
SSR-PB24
C100FE-#
PCI-DUAL-AC5
First Ports A, B, & C
Second Ports A, B, & C
Figure 3. PCI-DUAL-AC5 to SSR-PB24 cabling
The 24-bits of digital I/O on PCI-DUAL-AC5 connector pins 1-48 (base address +0 through +2) control the
first relay rack. The 24-bits of digital I/O on pins 51-98 (base address +4 through +6) control the second SSR
rack.
Figure 1 is a pin translation of pins 51 thru 100 of the C100FE-x or C100FF-x cable to the cable's second
50-pin connector. The first 50 pins are a one-to-one relationship to the first 50-pin connector.
82C55 emulation
The PCI-DUAL-AC5 board emulates the 82C55 chip. The 82C55 emulation initializes all ports as inputs on
power-up and reset. A TTL input is a high impedance input. If you connect another TTL input device to the
output, it could be turned on or off every time the board is reset.
To establish a consistent TTL level at power-up, use resistors tied to either +5V (pull-up) or ground (pull-
down). There are open locations for pull-up and pull-down resistor packs on the board.
Whenever an 82C55 emulation is powered on or reset, all pins are set to high-impedance input. Based on
standard TTL functionality, these inputs will typically float high, and may have enough drive current to turn on
external devices.
Consequently, if you have output devices such as solid state relays, they may be switched on whenever the
computer is powered on or reset. To prevent unwanted switching, and to drive all outputs to a known state after
power on or reset, pull all pins either high or low through a 2.2 K resistor.