Measurement Computing PCI-DAS6402/16 - Manual (Page 26)

PCI-DAS6402/16 User's Guide Specifications
Table 10. Typical accuracy specifications
Range Typical accuracy
±10.000 V ±3.5 LSB
±5.000 V ±3.5 LSB
0 to +10.00 V ±3.5 LSB
0 to +5.000 V ±3.5 LSB
Accuracy components
Table 11. Accuracy component specifications
Range Gain error (LSB) Offset error (LSB) DLE (LSB) ILE (LSB)
±10.000 V ±2.0 max, ±1.5 typ ±2.0 max, ±1.0 typ ±1.0 max, ±0.5 typ ±1.0 max, ±0.5 typ
±5.000 V ±2.0 max, ±1.5 typ ±2.0 max, ±1.0 typ ±1.0 max, ±0.5 typ ±1.0 max, ±0.5 typ
0 to +10.00 V ±2.0 max, ±1.5 typ ±2.0 max, ±1.0 typ ±1.0 max, ±0.5 typ ±1.0 max, ±0.5 typ
0 to +5.000 V ±2.0 max, ±1.5 typ ±2.0 max, ±1.0 typ ±1.0 max, ±0.5 typ ±1.0 max, ±0.5 typ
Each PCI-DAS6402/16 is tested at the factory to assure the board’s overall error does not exceed ±4.0 LSB.
Total analog output error is a combination of gain, offset, integral linearity, and differential linearity error. The
theoretical worst-case error of the board may be calculated by summing these component errors. Worst case
error is realized only in the unlikely event that each of the component errors are at their maximum level, and
causing error in the same direction. Although an examination of the chart and a summation of the maximum
theoretical errors shows that the board could theoretically exhibit a ±6.0 LSB error, our testing assures this error
is never realized in a board that we ship.
Typical accuracy is derived directly from the various component typical errors. This typical, maximum error
calculation for the PCI-DAS6402/16 yields ±3.5 LSB. However, this again assumes that each of the errors
contributes in the same direction and the ±3.5 LSB specification is quite conservative.
Analog output pacing and triggering
Table 12. Analog output pacing and triggering specifications
Internal counter – ASIC
External source (D/A external pacer) D/A pacing
(SW programmable)
Software paced
D/A gate sources
(SW programmable) ! External digital (external D/A trigger/pacer gate)
! External analog (analog trigger in)
D/A gating modes ! External digital: Programmable, active high or active low, level or edge
! External analog: Software-configurable for above or below reference. Gating levels set by
DAC0 or DAC1
D/A trigger sources External digital (external D/A trigger/pacer gate)
Software triggered
D/A triggering modes External digital: Software-configurable for rising or falling edge.
Data transfer ! From 16k RAM buffer via DMA (demand or non-demand mode) using scatter gather.
! Programmed I/O
! Update DACs individually or simultaneously (SW selectable)
Throughput 100 kHz max per channel, 2 channels simultaneous
5-5