1 overview, 2 ethercat ip core for altera fpgas, 1 fpga design tool compatibility – BECKHOFF EtherCAT IPCore Section III User Manual
Page 4: Overview, Ethercat ip core for altera fpgas, Fpga design tool compatibility
Overview
Slave Controller
– EtherCAT IP Core Data Sheet Addendum
1
1
Overview
This document provides latest release notes, documentation addendum, supported IP Core design flows, and supported IP Core FPGA types for the following Beckhoff EtherCAT Slave Controllers:
EtherCAT IP Core for Altera
®
FPGAs (up to V2.4.3 / V3.0.10)
EtherCAT IP Core for Xilinx
®
FPGAs (up to V2.04d Patch 1 / V3.00k)
Refer to the ESC data sheets for further information. The ESC data sheets are available from the Beckhoff homepag
2
EtherCAT IP Core for Altera FPGAs
2.1
FPGA design tool compatibility
Starting with V2.4.0, Qsys is supported (the example designs of V2.4.0 are SoPC builder based).
Table 1: EtherCAT IP Core for Altera FPGAs compatibility with Altera Quartus II / NIOS EDS
IP Core
version
Release
date
Tool
compatibility
Version compatibility
SoPC
Builder
Qsys
5.1
SP2
6.1
7.0
7.1
SP1
7.2
SP2
8.0
9.0
SP1
9.1
10.0 10.1
11.0 11.1
SP2
12.0
SP1
12.1
SP1
13.0
SP1
13.1.4 14.0
1
1.0.0
7/2006
●
-
●
1.1.0
11/2006
●
-
●
1.1.1
1/2007
●
-
●
●
●
●
2.0.0
8/2007
●
-
●
●
●
●
2.2.0
6/2008
●
-
●
●
●
●
●
●
2.2.1
6/2009
●
-
-
-
-
-
-
-
●
2.3.0
12/2009
●
-
-
-
-
-
-
-
-
●
2.3.1
2/2010
●
-
-
-
-
-
-
-
-
●
2.3.2
3/2010
●
-
-
-
-
-
-
-
-
●
●
●
○
2.4.0
3/2011
●
○
-
-
-
-
-
-
-
-
-
●
●
●
-
2.4.0
Patch 5
6/2012
●
○
-
-
-
-
-
-
-
-
-
●
●
●
●
2.4.3
7/2013
●
●
-
-
-
-
-
-
-
-
-
●
●
●
●
●
●
●
●
2.4.4
1/2015
●
●
-
-
-
-
-
-
-
-
-
●
●
●
●
●
●
●
●
●
3.0.0
3/2013
●
●
-
-
-
-
-
-
-
-
-
-
●
●
●
●
3.0.1
3/2013
●
●
-
-
-
-
-
-
-
-
-
-
●
●
●
●
●
3.0.2
5/2013
●
●
-
-
-
-
-
-
-
-
-
-
●
●
●
●
●
●
3.0.5
2/2014
●
●
-
-
-
-
-
-
-
-
-
-
●
●
●
●
●
●
3.0.6
4/2014
●
●
-
-
-
-
-
-
-
-
-
-
●
●
●
●
●
●
○
3.0.9
9/2014
●
●
-
-
-
-
-
-
-
-
-
-
●
●
●
●
●
●
●
●
3.0.10
1/2015
●
●
-
-
-
-
-
-
-
-
-
-
●
●
●
●
1
Cyclone III devices are not supported anymore by Quartus, corresponding example designs cannot be synthesized. Refer to known issues for more details.