Zilog EZ80F916 - Manual (Page 31)

eZ80F91 Modular Development Kit
User Manual
UM017010-0112 Programming On-Chip Flash Memory
26
// Init_IRDA
// Make sure to first set PD2 as a port bit, an output and
// set it Low.
PD_ALT1 &= 0xFC; // PD0 = uart0tx, PD1 = uart0_rx
PD_ALT2 |= 0x03; // Enable alternate function
UART_LCTL0= 0x80; // Select dlab to access baud rate
generator
BRG_DLRL0=0x2F; // Baud rate Masterclock/(16*baudrate)
BRG_DLRH0=0x00; // High byte of baud rate
UART_LCTL0=0x00; // Disable dlab
UART_FCTL0=0xC7; // Clear tx fifo, enable fifo
UART_LCTL0=0x03; // 8bit, N, 1 stop
IR_CTL = 0x03; // enable IRDA Encode/decode and Receive
// enable bit.
// IRDA_Xmit
IR_CTL = 0x01; // Disable receive
Putchar(0xb0); // Output a byte to the uart0 port.
Programming On-Chip Flash Memory
To program the 32 K boot block on the internal on-chip Flash memory,
shunt JP1 on the eZ80F91 Mini Enet Module must be installed. Table 8
lists the settings for shunt JP1.
Table 8. Shunt JP1, eZ80F91 Module
Symbol Jumper Name
Shunt
Status
Function Affected Device
JP1 F91_WE In (Default) On-chip Flash is enabled for
writing to boot block.
On-chip Flash
Out On-chip Flash memory boot
block is write-protected. On-chip Flash