Zilog EZ80F916 User Manual
Page 22
eZ80F91 Modular Development Kit
User Manual
UM017010-0112
Peripheral and I/O External Interface
17
Table 4. eZ80Acclaim! MDS Adapter Board I/O
External Connector JP2 Identification
1
Pin
Symbol
Signal Direction
Active Level
eZ80F91 Signal
2
1–8
PA7 to PA0
Bidirectional
n/a
Yes
11–18
PB7 to PB0
Bidirectional
n/a
Yes
20–27
PC7 to PC0
Bidirectional
n/a
Yes
28, 29
PD7, PD6
Bidirectional
n/a
Yes
31–36
PD5 to PD0
Bidirectional
n/a
Yes
37
TDO
Output
n/a
Yes
38
TDI
I/O
n/a
Yes
40
TRIGOUT
Output
n/a
Yes
41
TCK
Input
n/a
Yes
42
TMS
Input
n/a
Yes
43
RTC_V
DD
Input
n/a
Yes
44
EZ80CLK
Output
n/a
Yes
45
IICSCL
I/O
n/a
Yes
47
IICSDA
I/O
n/a
Yes
49
FLASHWE
Input
Low
No
51
CS3
Output
Low
Yes
52
DIS_IRDA
Input
Low
No
53
RST
I/O
Low
Yes
54
WAIT
Input
Low
Yes
57
HALT_SLP
Output
Low
Yes
58
NMI
Input
Low
Yes
60
unused
n/a
n/a
n/a
Notes:
1. To simplify interface description, Power and Ground nets are omitted from this table. The entire interface is
represented in the eZ80Acclaim! MDS Adapter Board schematics; see Figures 8 and 9.
2. The Power and Ground nets are connected directly to the eZ80F91 device.