Zilog EZ80F916 User Manual
Page 18
eZ80F91 Modular Development Kit
User Manual
UM017010-0112
Peripheral and I/O External Interface
13
The following signals are not connected and are unavailable on the as-
sociated pins:
•
Pin 36, DIS_FLASH
•
Pin 42, CS1
•
Pin 53, MREQ
•
Pin 54, IOREQ
•
Pin 58, INSTRD
•
Pin 59, BUSACK
•
Pin 60, BUSREQ
Table 3. eZ80Acclaim! MDS Adapter Board Peripheral Bus
External Connector JP1 Identification
1
Pin
Symbol
Signal Direction
Active Level
eZ80F91 Signal
2
1–4, 6,
8, 35
Unused
n/a
n/a
n/a
5
TRSTN
Input
Low
Yes
11
A6
Bidirectional
n/a
Yes
12
A0
Bidirectional
n/a
Yes
13
A10
Bidirectional
n/a
Yes
14
A3
Bidirectional
n/a
Yes
17
A8
Bidirectional
n/a
Yes
18
A7
Bidirectional
n/a
Yes
Notes:
1. To simplify interface description, Power and Ground nets are omitted from this table. The entire interface is
represented in the eZ80Acclaim! MDS Adapter Board schematics; see Figures 8 and 9.
2. The Power and Ground nets are connected directly to the eZ80F91 device.
Caution: