NEXCOM NEX 852VL2 - Manual (Page 47)

System BIOS cacheable
Selecting Enabled allows caching of the system BIOS ROM at F0000h-FFFFFh, resulting in better system
performance. However, if any program writes to this memory area, a system error may result. The available
choices are Enabled, Disabled.
Video BIOS Cacheable
Selecting Enabled allows caching of the video BIOS ROM at C0000h, resulting in better video performance.
However, if any program writes to this memory area, a system error may result. The choices: Enabled,
Disabled.
Memory Hole At 15M – 16M
In order to improve performance, certain space in memory is reserved for ISA cards; This memory must be
mapped into the memory.
The choices: Enabled, Disabled.
Delayed Transaction
The chipset has an embedded 32-bit posted write buffer to support delay transactions cycles. Select En-
abled to support compliance with PCI specification version 2.1.
On-Chip VGA
By default, the On-Chip VGA or chipset-integrated VGA is Enabled.
On-Chip Frame Buffer Size
The On-Chip Frame Buffer Size can be set as 1, 4, 8, 16 or 32MB. This memory is shared with the system
memory.
Boot Display
Boot Display determines the display output device where the system boots. The options are Auto, CRT,
LFP, and CRT+LFP.
Panel Type
This field allows user to decide the LVDS panel resolution. Please refer to the BIOS for the resolution.
After you have made your selections in the Advanced Chipset Features setup, press <ESC> to go back to
the main screen.
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