Using nios ii linux, Opening a terminal connection to linux, Logging into nios ii linux – Altera Nios II User Manual
Page 13: Using nios ii linux –13

Altera Corporation
13
October 2005
Nios II Evaluation Kit User Guide
The Nios II Evaluation Board
Using Nios II
Linux
This section describes the procedures for establishing a serial connection
and logging into Nios II Linux to access sample network applications.
Opening a Terminal Connection to Linux
The boot code in flash memory is the µClinux 2.6 kernel. The startup
procedure for the kernel will pause until a terminal connection is
established between your PC and the board via the USB cable. To watch
the kernel complete its startup procedure, perform the following steps:
1.
On the Windows Start menu, click Programs, Altera, Nios II
Evaluation Kit <installed version>, Nios II SDK Shell to start the
Nios II SDK Shell.
2.
At the shell prompt, type nios2-terminal
r
The kernel startup messages will start scrolling, ending with a Nios II
Linux login prompt. See Figure 2.
Figure 2. Nios II Linux Login Prompt
Logging into Nios II Linux
At the login prompt, use the following username and password:
Username
: nios
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)