Avalue ESM-CDV - Manual (Page 27)

ESM-CDV User ’s Manual
ESM-CDV User ’s Manual 27
2.4.2.1.7 PCI Express Signals
Signal Signal Description
PCIE_TX[0:3] +/- PCI Express Differential Transmit Pair 0-3
PCIE_RX[0:3] +/- PCI Express Differential Receive Pair 0-3
PCIE0_CK_REF+/-
Reference clock output for PCI Express lanes 0-7 and for PCI Express Graphics
lanes 0-15
2.4.2.1.8 Power Signals
Signal Signal Description
VCC_5V_SBY
Standby power input: +5.0V nominal. See Electrical Specifications for allowable
input range. If VCC5_SBY is used, all available VCC_5V_SBY pins on the
connector(s) must be used. Only used for standby and suspend functions. May be
left unconnected if these functions are not used in the system design.
VCC_RTC Real-time clock circuit-power input. Nominally +3.0V.
2.4.2.1.9 Power & System Management Signals
Signal Signal Description
SUS_S3# Indicates system is in Suspend to RAM state. Active low output.
SUS_S4# Indicates system is in Suspend to Disk state. Active low output.
SUS_S5# Indicates system is in Soft Off state.
BATLOW# Indicates that external battery is low
PWRBTN# Power button to bring system out of S5 (soft off), active on rising edge.
SMB_CK System Management Bus bidirectional clock line.
SMB_DTA System Management Bus bidirectional data line.
SMB_ALERT#
System Management Bus Alert - input can be used to generate an SMI# (System
Management Interrupt) or to wake the system.
SUS_STAT# Indicates imminent suspend operation.
PWR_OK Power OK from main power supply
THRMTRIP# Active low output indicating that the CPU has entered thermal shutdown.
THRM# Input from off-module temp sensor indicating and over-temp situation.
SYS_RESET# Reset button input. Active low input.
WAKE0# PCI Express wake up signal.
WAKE1# General purpose wake up signal.