Figure 1-9, Temperature sensors on backplane, Preliminary – ADLINK PXES-2780 User Manual
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Introduction
Figure 1-9: Temperature Sensors on Backplane
PCI Express Link Capability
The PXES-2780 backplane provides a configurable PCIe
switch fabric, allowing PCI express link configuration between
system slot and PCIe switch fabric to change from from 4-link x
4 lanes (factory default) to 2-link x 8 lanes.
4-link x 4 lanes configuration delivers the most balanced PCI
express topology, with all the peripheral slots sharing equally in
system bandwidth.
2-link is installed into PCIe x8 peripheral slots, providing the
module with the highest throughput. For more details, please
see “PXIe Link” on page 35.
NOTE:
NOTE:
For details of chassis temperature detection, please see
“Chassis Temperature” on page 37
NOTE:
NOTE:
Connector pin assignments of the PXI Express System Con-
troller Slot, PXI Express System Timing Slot, PXI Express
Hybrid Peripheral Slots, and PXI Express Peripheral Slots
comply with the default pin assignments as defined in PXI-5
PXI Express hardware specification Rev.1.0.
T1
T2
T3
T4
T5
T6
T7
T8
PRELIMINARY