Digilent DIO4 - Manual (Page 8)

DIO4 Reference Manual Digilent, Inc.
www.digilentinc.com Page 8
the frequency at which all information on the
display is redrawn. The minimum refresh
frequency is a function of the display’s
phosphor and electron beam intensity, with
practical refresh frequencies falling in the 50Hz
to 120Hz range. The number of lines to be
displayed at a given refresh frequency defines
the horizontal “retrace” frequency. For a 640-
pixel by 480-row display using a 25MHz pixel
clock and 60 +/-1Hz refresh, the signal timings
shown in the table below can be derived.
Timings for sync pulse width and front and
back porch intervals (porch intervals are the
pre- and post-sync pulse times during which
information cannot be displayed) are based on
observations taken from VGA displays. A VGA controller circuit decodes the output of a
horizontal-sync counter driven by the pixel clock
to generate HS signal timings. This counter can
be used to locate any pixel location on a given
row. Likewise, the output of a vertical-sync
counter that increments with each HS pulse can
be used to generate VS signal timings, and this
counter can be used to locate any given row.
These two continually running counters can be
used to form an address into video RAM. No
time relationship between the onset of the HS
pulse and the onset of the VS pulse is specified,
so the designer can arrange the counters to
easily form video RAM addresses, or to minimize
decoding logic for sync pulse generation.
Expansion Connectors
Connector pinouts are shown below.
Separately available tables show pass-through
connections for the devices on the DIO4 board
when it is attached to various system boards.
Note that connectors on system boards and
peripheral boards use the same numbering
scheme – that is, if the board is held with the
component side towards you and the
connectors pointing up, then pin #1 is always
on the bottom left corner of the connector.
This means that when a peripheral board is
plugged into a system board, the numbering
patterns are mirrored. Pin #1 on the peripheral
board mates with pin #39 on the system board,
peripheral board pin #2 mates with system pin
#40, etc. Note that odd pin number mating pairs
add to 40, and even pin number mating pairs
add to 42 (so pin 36 mates with pin 6, pin 27
mates with pin 13, etc.).
T
S
T
disp
T
pw
T
fp
T
bp
T
S
T
disp
T
pw
T
fp
T
bp
Sync pulse time
Display time
VS pulse width
VS front porch
VS back porch
16.7ms
15.36ms
64 us
320 us
928 us
416,800
384,000
1,600
8,000
23,200
521
480
2
10
29
Symbol Parameter
Time Clocks Lines
Vertical Sync
32 us
25.6 us
3.84 us
640 ns
1.92 us
800
640
96
16
48
Clocks
Horizontal Sync
Time