Digilent 410-145P - Manual (Page 4)

Digilent, Inc. Cerebot Nano Reference Manual
www.digilentinc.com page 4 of 6
Copyright Digilent, Inc. All rights reserved. Other product and company names mentioned may be trademarks of their respective owners.
AVR Clock Fuse Settings
AVR microcontrollers use control bits called
fuses to set basic operating parameters for the
device. The SPI controller uses the clock
source set by the fuses for its clock. If the clock
source fuses are set to select a clock source
that doesn’t exist on the board, the SPI
controller won’t work and it will no longer be
possible to program the microcontroller via the
in-system programming protocol. The Cerebot
Nano can only use the internal RC oscillator as
the clock source.
If the external oscillator, or one of the
crystal/resonator clock sources is selected, it
may be possible to recover the board by
applying a suitable clock signal to pin 1 of
connector JB. There is an applications note on
the Digilent web site illustrating this technique
for the Cerebot board.
In addition, the maximum SPI clock frequency
is the selected clock frequency divided by four.
If the 128KHz internal oscillator is selected as
the clock source, the SPI clock would need to
be set to a frequency of 32KHz or less. The
Digilent programming cables do not support
frequencies that low, so if the 128KHz internal
oscillator is selected for the clock source, the
board will no longer be programmable using
the Digilent programming cable.
Two-Wire Serial Interface
The Atmel TWI interface is a medium speed
(400 Kbps), synchronous, serial,
communications bus. The TWI interface
supports master or slave operation with up to
128 devices on the bus. Each device is given a
unique address, and the protocol has the
ability to address packets to a specific device
or to broadcast packets to all devices on the
bus. For detailed information on configuring
and using the two-wire interface see the
ATmega168 data sheet at
www.atmel.com .
The Cerebot Nano has two ways to connect to
a TWI bus. The TWI signals, SCL and SDA,
are available on 6-pin connector JB or on the
2-pin connector J2.
Pins one and two of connector JB and
connector J2 provide two positions for
connecting to the TWI signals. By using two-
wire cables (available separately from
Digilent), a daisy chain of Cerebot Nanos or
other TWI-capable boards can be created.
The TWI bus is an open-collector bus. Devices
on the bus actively drive the signals low. When
no device is driving the lines low, pull-up
resistors achieve the high state on the TWI
lines. A single device on the TWI bus must
provide the pull-up resistors.
The Cerebot Nano provides pull-up resistors
that are controlled by software.
I/O port B, bits 6 and 7 (PB6 and PB7), are
connected to the pull-up resistors. To enable
the pull-ups, configure these pins as outputs
and set the I/O port output bits to “1”. To
disable the pull-ups, configure these pins as
inputs with the internal pull-ups disabled. Both
TWI pull-ups should be enabled or disabled
together. Only one device on the TWI bus
should have pull-ups enabled.
A port bit is configured as an input or an output
by setting the corresponding bit in the DDR
register. The pin becomes an output by writing
a “1” and an input by writing a “0”. When a pin
is configured as an input, an internal pull-up
resistor is enabled by writing the corresponding
output port bit to “1” and disabled by writing it
to “0”. See the Atmel Atmega168 data sheet
for more information.