Design implementation, A bunch of things happen under the hood – Digilent XUPV2P User Manual

Page 12

May 2005

XUPV2P BSB support 12

Design Implementation

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A bunch of things happen under the hood!!

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An HDL representation of the design will be created in the hdl directory

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Each submodule is synthesized into netlists stored in subdirectories under

implementation

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Ngdbuild combines the netlists and performs DRCs

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The netlist is placed and routed (par) and a bitfile is generated

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The software device drivers are compiled into libraries

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The user application is compiled and linked against the libraries to created

an executable elf file

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Finally, the BRAMs in the bit file which comprise the program memory are

configured with the contents of the elf file

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Implementation/download.bit is the file to program the FPGA!