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Cypress CY7C1019BN User Manual

Page 3

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CY7C1019BN

Document #: 001-06425 Rev. **

Page 3 of 8

AC Test Loads and Waveforms

Switching Characteristics

[4]

Over the Operating Range

Parameter

Description

-12

-15

Unit

Min.

Max.

Min.

Max.

Read Cycle

t

RC

Read Cycle Time

12

15

ns

t

AA

Address to Data Valid

12

15

ns

t

OHA

Data Hold from Address Change

3

3

ns

t

ACE

CE LOW to Data Valid

12

15

ns

t

DOE

OE LOW to Data Valid

6

7

ns

t

LZOE

OE LOW to Low Z

0

0

ns

t

HZOE

OE HIGH to High Z

[5, 6]

6

7

ns

t

LZCE

CE LOW to Low Z

[6]

3

3

ns

t

HZCE

CE HIGH to High Z

[5, 6]

6

7

ns

t

PU

CE LOW to Power-Up

0

0

ns

t

PD

CE HIGH to Power-Down

12

15

ns

Write Cycle

[7, 8]

t

WC

Write Cycle Time

12

15

ns

t

SCE

CE LOW to Write End

9

10

ns

t

AW

Address Set-Up to Write End

8

10

ns

t

HA

Address Hold from Write End

0

0

ns

t

SA

Address Set-Up to Write Start

0

0

ns

t

PWE

WE Pulse Width

8

10

ns

t

SD

Data Set-Up to Write End

6

8

ns

t

HD

Data Hold from Write End

0

0

ns

t

LZWE

WE HIGH to Low Z

[6]

3

3

ns

t

HZWE

WE LOW to High Z

[5, 6]

6

7

ns

Notes:

4. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified

I

OL

/I

OH

and 30-pF load capacitance.

5. t

HZOE

, t

HZCE

, and t

HZWE

are specified with a load capacitance of 5 pF as in part (b) of AC Test Loads. Transition is measured

±500 mV from steady-state voltage.

6. At any given temperature and voltage condition, t

HZCE

is less than t

LZCE

, t

HZOE

is less than t

LZOE

, and t

HZWE

is less than t

LZWE

for any given device.

7. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. CE and WE must be LOW to initiate a write, and the transition of any

of these signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write.

8. The minimum write cycle time for Write Cycle no. 3 (WE controlled, OE LOW) is the sum of t

HZWE

and t

SD

.

90%

10%

3.0V

GND

90%

10%

ALL INPUT PULSES

5V

OUTPUT

30 pF

INCLUDING
JIG AND
SCOPE

5V

OUTPUT

5 pF

INCLUDING
JIG AND
SCOPE

(a)

(b)

≤ 3 ns

≤ 3 ns

OUTPUT

R1 480

R1 480

R2

255

R2

255

167

Equivalent to: THÉVENIN EQUIVALENT

1.73V

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