Kontron AM5010 IPMI - Manual (Page 29)

AM5010 IPMI Firmware User Guide
ID 1022-2948, Rev. 1.0 © 2008 Kontron AG Page 29
If needed the standard way to download FRU information to the module is to use the open
tool ‘ipmitool’ [1] for the download of an image file. Ipmitool allows the downloading
(‘ipmitool fru write …’). The rollback to the formerly running operational code is possible as
well (‘ipmitool fwum rollback’).
All IPMI interfaces which are offered by ipmitool are usable (KCS interface, IPMB bus,
LAN). This allows local upgrade or remote upgrade. Note that the KCS interface is only
usable on a powered payload.
6.8 E-Keying
E-Keying has been defined in the AMC.0 R1.0 Specification to prevent module damage,
prevent malfunction, and verify bay connection compatibility. The FRU data contains the
AMC point-to-point connectivity record as described in Section 3.9.2 of the AMC.0 R1.0
specification. The Set/Get AMC Port State IPMI commands defined by the AMC.0
specification are used by the carrier for either granting or rejecting the E-keys.
6.9 PCI Express Clock Source
The PCI-E reference clock may be generated locally by the module (default configuration) or
acquired via the AMC connector (common/external reference clock). The standard FRU E-
Keying data for the AM5010 contains an AMC Link Descriptor for the PCI-E clock. If an
external clock is available, the carrier’s IPMC provides it by a “Set AMC Port State”
command. The appropriate control signal is latched by the on-board FPGA during E-keying.
The PCI-E reference clock provided by the carrier may be slightly modulated (Spread
Spectrum Clock - SSC). Standard FRU E-Keying data for AM5010 contains two AMC Link
Descriptors for each PCI-E channel, one with SSC (priority 1) or with non-SSC (priority 2).
The carrier’s IPMC makes the selection during E-keying by “Set AMC Port State”
commands“.
The user can find the information whether the local reference clock or the AMC reference
clock is used in:
• The BIOS set up menu (Advanced/IPMI 1.5 Configuration)
• The board’s register “MMC I/O Status Register” at address 0x281 (please refer to the
AM5010 User Guide)
6.10 PCI Express x1 / x4
The AM5010 supports either one PCI-E x4 connection or up to four PCI-E x1 connections.
What connections are activated will be decided during E-keying. The user can find the
information whether x4 or x1 is selected in the board’s register “MMC I/O Status Register” at
address 0x281 (please refer to the AM5010 User Guide).
6.11 BIOS Supervisory and Automated Firmware Hub Switch
After each payload reset, the MMC expects a special message from the BIOS, i.e. the BIOS
checksum report. If the checksum (computed by the BIOS boot block) is incorrect or the
message itself is not available within 15 seconds after payload reset, then the currently used
Firmware Hub is assumed to contain an invalid or a corrupted BIOS image. In this case, an