Cirrus Logic CS5529 - Manual (Page 20)

CS5529
20 DS246F5
Configuration Register Descriptions
D23(MSB) D22 D21 D20 D19 D18 D17 D16 D15 D14 D13 D12
A1 A0 D3 D2 D1 D0 NU LPM WR2 WR1 WR0 U/B
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
NU NU NU NU RS RV PF PSS DF CC2 CC1 CC0
BIT NAME VALUE FUNCTION
D23-D22 Latch Outputs, A1-A0 00 R* Latch Output Pins A1-A0 mimic the D23-D22 Register bits.
D21-D18 Latch Outputs, D3-D0 0000 R* Latch Output Pins D3-D0 mimic the D21-D18 Register bits.
D17 Not Used, NU 0 R Must always be logic zero.
D16 Low Power Mode,
LPM 0
1 R Normal Mode (
≅ 2.5 mW)
Reduced Power Mode (
≅ 1 mW)
D15-D13 Word Rate, WR2-0
(Note: Rates valid for
XIN = 32.768 kHz)
000
001
010
011
100
101
110
111
R 15.0 Sps (2180 XIN cycles)
30.0 Sps (1092 XIN cycles)
61.6 Sps (532 XIN cycles)
84.5 Sps (388 XIN cycles)
101.1 Sps (324 XIN cycles)
1.88 Sps (17444 XIN cycles)
3.76 Sps (8724 XIN cycles)
7.51 Sps (4364 XIN cycles)
D12 Unipolar/Bipolar, U/B 0
1 R Bipolar Measurement mode
Unipolar Measurement mode
D11-D8 Not Used, NU 0 R Must always be logic 0.
D7 Reset System, RS 0
1 R Normal Operation
Activate a Reset cycle. To return to normal operation this bit must
be written back to logic zero.
D6 Reset Valid , RV 0
1
R
No reset has occurred or bit has been cleared (read only).
Valid Reset has occurred. (Cleared when read.)
D5 Port Flag, PF 0
1 R Port Flag mode inactive
Port Flag mode active
D4 Power Save Select,
PSS 0
1 R Standby Mode (Oscillator active, allows quick power-up)
Sleep Mode (Oscillator inactive)
D3 Done Flag, DF 0
1 R Done Flag bit is cleared (read only).
Calibration or Conversion cycle completed (read only).
D2-D0 Calibration Control
Bits, CC2-CC0 000
001
010
011
100
101
110
111
R Normal operation (no calibration)
Offset -- Self-Calibration
Gain -- Self-Calibration
Offset self-cal followed by Gain self-calibration
Not Used.
Offset -- System Calibration
Gain -- System Calibration
Not Used.
* R indicates the bit value after the part is reset