Appendix, An152 – Cirrus Logic AN152 User Manual
Page 7

AN152
AN152REV1
7
from +3.3 down to 2.7 V. The external load capa-
bility of the charge pump is limited when VD+ gets
to 2.7 V.
Running the CS552X at Frequencies other
than 32.768 kHz
The XIN frequency into the converters is used to
derive the charge pump clock frequency. The XIN
frequency is nominally 32.768 kHz. If this fre-
quency is changed to some other frequency, the
charge pump capacitor should be scaled inversely.
For example, if XIN is scaled from 32.768 kHz to
100 kHz, the charge pump capacitor should re-
duced to about 1/3 of the value used at 32.768 kHz.
See the appendix for more exact equations which
can help determine the value of the charge pump
capacitor.
APPENDIX
Equation for charge pump as depicted in figure 4.
I = vfc
Current = Voltage x Frequency x Capacitor
I
NBV
+ I
EXT
= [(VD+) - (2 x V
D
) - (2.1 V)] [
η
CPCLK] [C
C
]
I
NBV
= Current via NBV pin. Nominally 450µA for CS5525/26; 375 µA for CS5521/23; and 700 µA for
CS5522/24/28.
I
EXT
= Current via External Load
VD+ = VD+ supply Voltage; typically 5 V.
V
D
= Forward Diode Voltage; typically 0.65 V.
-2.1 V = Regulated value of NBV (could use VA+/2.38 if VA+ is other than 5.0 V).
CPCLK = Charge Pump Clock. Nominally 32.768 kHz for CS5525 and CS5526; 16.384 kHz for
CS5521/22/23/24/28.
η =
Duty cycle of CPCLK (average CPCLK frequency / maximum CPCLK frequency) to regulate NBV,
typically 0.3 to 0.7.
Choose C
C
to give the proper I
NBV
+ I
EXT
with the lowest VD+ and
η
set to some value between 0.3 and
0.7.
Note: I
EXT
should never exceed 2 mA.