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5 decoding pc commands, An118 – Cirrus Logic AN118 User Manual

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AN118

AN118REV2

5

3.5 Decoding PC Commands

The decode_command routine is where most of the
functionality of the program lies. It consists of
many smaller routines to direct the flow of data to
the proper locations. Decode_command accepts in-
formation from the PC, decides which tasks need to
be done based on that information, and carries out
those tasks accordingly. This is accomplished
through the use of a very large switch statement,
based on the input command byte, which tests for
every possibility and performs the appropriate rou-
tines shown in Section 7. “Appendix: 80C51 Mi-
crocontroller Code” on page 9.

Write Register - If the PC has sent a command to
write to a specific register in the
CS5521/22/23/24/28, three more bytes are re-
ceived from the PC using rxser (24-bit data is al-
ways transferred via the UART in the order: low
byte, middle byte, high byte). Then the informa-
tion, including the command byte is sent to the con-
verter using the write_to_register function. In
contrast with the PC serial data, data transferred to
or from the ADC is always in the order: high byte,
middle byte, low byte.

Write Channel Setup Registers - In the case that the
PC requests to write to the Channel Setup Registers
(CSRs), the program receives another byte from the
PC to find out how many registers to write to. The
command word 0x05(HEX) is sent to the ADC to
begin writing to the registers. The data is received
from the PC using rxser, and sent directly to the
ADC using transfer_byte. This process of receiv-
ing data from the PC and transferring it to the ADC
is repeated until the requested number of bytes has
been sent to the PC.

Read Registers - When the decoded command is
asking to read the ADC’s internal registers,
read_register is called, using the command sent
from the PC. The information obtained by this
function is then sent to the PC using txser.

Read Conversion Data FIFO - To read the conver-
sion data FIFO, the sample size requested, the con-
version channel, and the loop bit status are received
from the PC, in that order. The conversion channel
is then sent to the ADC to begin a conversion, and
SDO is polled until it falls, indicating that the con-
version is complete. At this time, a byte of zeros is
sent to the ADC to initiate the data transfer, and the
program loops through to receive each 24-bit con-
version word and send it to the PC, for as many
times as the sample size that has been requested. If
the LP bit is set, then another sample set is received
from the ADC, but not sent to the PC.

Read Channel Setup Registers - To read the CSRs,
this algorithm first obtains the number of registers
to read from the PC using rxser. It then transfers the
0x0D(HEX) command to the ADC, indicating that
the CSRs are to be read. Next, the individual regis-
ters are read from the ADC and sent to the PC until
the number of registers specified by the PC com-
mand has been met.

Normal Conversions - For a normal conversion us-
ing any Setup, the read_conversion subroutine is
executed using the appropriate command word.
The data is then sent directly to the PC using txser.

Self Calibration - To perform a self-offset or self-
gain calibration using any Setup, the appropriate
command word is sent to the ADC, and SDO is
polled until the calibration is complete to avoid
sending a new command when the ADC is busy.

System Calibration - System-offset and system-
gain calibrations use the same procedure as self cal-
ibration, but areseparated in the code to set the two
command sets apart from one another.

Variable Number of Normal Conversions - This
routine is used when a set of samples is requested
from the PC (as opposed to a single sample). The
sample index is obtained from the PC, as well as the
Setup to be used. The decode_sample_index rou-
tine is then called to find out exactly how many
conversions to perform. The conversion channel