Cirrus Logic AN118 - Manual (Page 16)

AN118
16 AN118REV2
/**********************/
/* Read from Register
*/
/**********************/
case 0x09: /* Offset Register Physical Channel 1 */
case 0x19: /* Offset Register Physical Channel 2 */
case 0x29: /* Offset Register Physical Channel 3 */
case 0x39: /* Offset Register Physical Channel 4 */
case 0x49: /* Offset Register Physical Channel 5 */
case 0x59: /* Offset Register Physical Channel 6 */
case 0x69: /* Offset Register Physical Channel 7 */
case 0x79: /* Offset Register Physical Channel 8 */
case 0x0A: /* Gain Register Physical Channel 1 */
case 0x1A: /* Gain Register Physical Channel 2 */
case 0x2A: /* Gain Register Physical Channel 3 */
case 0x3A: /* Gain Register Physical Channel 4 */
case 0x4A: /* Gain Register Physical Channel 5 */
case 0x5A: /* Gain Register Physical Channel 6 */
case 0x6A: /* Gain Register Physical Channel 7 */
case 0x7A: /* Gain Register Physical Channel 8 */
case 0x0B: /* Configuration Register */
read_register(command); /* Read register’s content */
TXSER(low_byte); /* Transfer bytes to PC*/
TXSER(mid_byte);
TXSER(high_byte);
COMM = 0x00;
/* Turn on LED*/
Delay();
COMM = 0x01;
/* Turn off LED*/
break;
/*****************************/
/* Read Conversion Data FIFO
*/
/*****************************/
case 0x0C:
COMM = 0x00; /* Turn on LED */
sample_size = RXSER(); /* How many Conversions? */
temp = RXSER(); /* What conversion channel? */
temp1 = RXSER(); /* Is LP bit set? */
/*Initiate Continuous Conversion*/
if(mode == 1) P1 = 0xF4;
/* Clear CSb */
transfer_byte(temp); /* Initiate Single conversion */
do { /* Nothing*/} while (SDO !=0); /* Wait for SDO to fall */
transfer_byte(0x00); /* Send all zeros */
for (j=0; j
high_byte = receive_byte();/* Receive Bytes */
mid_byte = receive_byte();