Cirrus Logic CRD5381 - Manual (Page 12)

12
DS56
3RD1
CRD5381
3. BLOCK DIAGRAM
PCM Data Ouput/
Serial Clock Input Header
CS5381 A
Quad Speed
Slave Mode
CS5381 B
Quad Speed
Slave Mode
CS8421 A
Master Input
Slave Ouput
CS8421 B
Master Input
Slave Output
Differential Analog
Inputs 1-4
TDM
ENABLE
TDM/SDOUT B
SDOUT A
2 2
2 2
LEFT
RIGHT
RIGHT
LEFT
SDOUT
LRCK
SCLK
SCLK
LRCK
SDOUT
ILRCK
ISCLK
SDIN
ISCLK
SDIN
ILRCK
OLRCK
OSCLK
SDOUT
SDOUT
OSCLK
OLRCK
INPUT LRCK
INPUT SCLK
TDM IN
Figure 13 on page 17 Figure 9 on page 13 &
Figure 10 on page 14
Figure 11 on page 15 Figure 11 on page 15
Figure 12 on page 16 Figure 12 on page 16
Figure 8. Block Diagram