Grounding and power supply decoupling, Table 1. system connections – Cirrus Logic CDB5331A User Manual
Page 3
The transceiver operates as a transmitter with the
MASTER/SLAVE jumper in the MASTER posi-
tion. LRCK, SDATA, and SCLK from the
CS5330A/31A will be available on HDR2.
HDR22 must be in the 0 position and HDR23
must be in the 1 position for MCLK to be an
output and to avoid bus contention on MCLK.
The transceiver operates as a receiver with the
MASTER/SLAVE jumper in the SLAVE posi-
tion. LRCK and SCLK on HDR2 become inputs.
However, the recommended mode of operation is
to generate MCLK on the evaluation board with
HDR23 in the 0 position and HDR22 in the 1
position. These default settings allow MCLK to
be an output, with LRCK and SCLK as inputs.
MCLK is always an output from the evaluation
board.
Grounding and Power Supply Decoupling
The CS5330A/31A requires careful attention to
power supply and grounding arrangements to op-
t i miz e p er fo rman ce. Fi gure 2 sh ows t he
r ec o mmen d ed p owe r ar ra ng e ment s. The
CS5330A/31A is positioned over the analog
ground plane, near the digital/analog ground
plane split, to minimize the distance that the
clocks travel. The series resistors are present on
the clock lines to reduce the effects of transient
currents when driving a capacitive load in master
mode, and reduce clock overshoot when apply-
ing external clocks to the CS5330A/31A in slave
mode.
This layout technique is used to minimize digital
noise and to insure proper power supply match-
ing/sequencing. The decoupling capacitors are
located as close to the CS5330A/31A as possi-
ble. Extensive use of ground plane fill on both
the analog and digital sections of the evaluation
board yield large reductions in radiated noise ef-
fects.
CONNECTOR INPUT/OUTPUT SIGNAL PRESENT
+5V input
(VD+) for CS8402A and digital section
(VA+) for CS5330A/31A and Analog input filter op-amp
GND input ground connection from power supply
AINL input left channel analog input
AINR input right channel analog input
MCLK, SCLK, LRCK,
SDATA
input/output I/O for master, serial, left/right clocks, and serial DATA
Digital Output output digital audio interface output via coax
Optical Output output digital audio interface output via optical
Table 1. System Connections
CDB5330A / CDB5331A
DS138DB2 19