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Figure 5. control port timing, spi mode, Figure 6. control port timing, 2 wire mode, 3 memory address pointer (map) – Cirrus Logic CS43122 User Manual

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CS43122

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6.3

Memory Address Pointer (MAP)

INCR (Auto MAP Increment Enable)

MAP0-2 (Memory Address Pointer)

Default = ‘0’

Default = ‘001’

0 - Disabled

1 - Enabled

7

6

5

4

3

2

1

0

INCR

Reserved

Reserved

Reserved

Reserved

MAP2

MAP1

MAP0

0

0

0

0

0

0

0

1

t r2

t f2

t dsu t dh

t sch

t scl

CS

CCLK

CDIN

t css

t csh

t spi

t srs

RST

Figure 5. Control Port Timing, SPI mode

SDA

SCL

001000

ADDR
AD0

R/W

Start

ACK

DATA
1-8

ACK

DATA
1-8

ACK

Stop

Note: If operation is a write, this byte contains the Memory Address Pointer, MAP.

Note 1

Figure 6. Control Port Timing, 2 wire Mode