Asus A7V400-MX SE - Manual (Page 52)

2 - 1 6 2 - 1 6 2 - 1 6 2 - 1 6 2 - 1 6 C h a p t e r 2 : B I O S s e t u p C h a p t e r 2 : B I O S s e t u p C h a p t e r 2 : B I O S s e t u p C h a p t e r 2 : B I O S s e t u p C h a p t e r 2 : B I O S s e t u p
2.5.2 2.5.2 2.5.2 2.5.2 2.5.2 Memory Configuration Memory Configuration Memory Configuration Memory Configuration Memory Configuration
This menu allows you to change the system memory settings.
Current DRAM Frequency [XXX MHz] Current DRAM Frequency [XXX MHz] Current DRAM Frequency [XXX MHz] Current DRAM Frequency [XXX MHz] Current DRAM Frequency [XXX MHz]
Displays the current memory frequency as auto-detected by the BIOS.
DRAM Clock [By SPD] DRAM Clock [By SPD] DRAM Clock [By SPD] DRAM Clock [By SPD] DRAM Clock [By SPD]
The DRAM clock are set according to the DRAM SPD (Serial Presence
Detect). You can manually set the DRAM clock parameters.
Configuration options: [By SPD] [133 MHz] [166 MHz]
DRAM Timing [Auto by SPD] DRAM Timing [Auto by SPD] DRAM Timing [Auto by SPD] DRAM Timing [Auto by SPD] DRAM Timing [Auto by SPD]
It is recommended that you set this parameter to [Auto by SPD]. Setting
to [Auto by SPD] synchronizes the DRAM timing with the DRAM clock.
Setting to [Manual] allows you to set the values for DRAM CAS Latency,
Bank Interleave, Pre-charge to Active (TRP) and Active to CMD (Trcd)
prameters. Configuration options: [Manual] [Auto By SPD] [Safe]
DRAM CAS Latency [2.5] DRAM CAS Latency [2.5] DRAM CAS Latency [2.5] DRAM CAS Latency [2.5] DRAM CAS Latency [2.5]
Sets the override clock cycle for the latency time between the DRAM read
command and the moment that the data actually becomes available.
Normally, the system determines the rate automatically by default.
Configuration options: [1.5] [2] [2.5] [3]
Bank Interleave [Disabled] Bank Interleave [Disabled] Bank Interleave [Disabled] Bank Interleave [Disabled] Bank Interleave [Disabled]
Sets the memory bank interleave. Configuration options: [Disabled]
[2 Bank] [4 Bank]
Precharge to Active (Trp) [5T] Precharge to Active (Trp) [5T] Precharge to Active (Trp) [5T] Precharge to Active (Trp) [5T] Precharge to Active (Trp) [5T]
Configuration options: [2T] [3T] [4T] [5T]
Memory Configuration
F1 : Help ↑↑↑↑↑↓↓↓↓↓ : Select Item -/+ : Change Value F5 : Setup Defaults
ESC : Exit →← →← →← →← →← : Select Menu Enter : Select Sub-menu F10 : Save and Exit
Select Menu
Item Specific Help
Set DRAM frequency.
Current DRAM Frequency 133MHz
DRAM Clock [By SPD]
DRAM Timing [Auto by SPD]
DRAM CAS Latency 2.5
Bank Interleave Disabled
Pre-charge to Active (Trp) 5T
Active to Precharge (Tras) 7T
Active to CMD (Trcd) 5T
DRAM Burst Length [4]
DRAM Command Rate [2T Command]
Write Recovery Time [3T]
tWTR [2T]