Atec Tektronix-DTG5334 - Manual (Page 2)

Data Sheet
Characteristics
Mainframe Characteristics
Basic Features
Platform – Benchtop mainframe with cold-swappable plug-and-play plug-in output
modules. Mainframes accept any combination of output modules.
Number of Slots for Output Modules –
DTG5078: 8 slots (A, B, C, D, E, F, G, H).
DTG5274: 4 slots (A, B, C, D).
New DTG5334: 4 slots (A, B, C, D).
Master-Slave Capabilities –
DTG5078: Up to three DTG5078 mainframes can be connected in Master-Slave
configuration.
DTG5274: Up to two DTG5274 mainframes can be connected in Master-Slave
configuration.
DTG5334: Up to two DTG5334 mainframes can be connected in Master-Slave
configuration.
Operating Modes –
Pulse Generator Mode (slots A to D only).
Data Generator Mode.
Output Patterns –
NRZ, RZ, R1, Pulse patterns (DTG5078/5274/5334: Slot A-D; DTG5078 Slot E-H,
NRZ only).
Timing Parameters
Data Rate Range –
DTG5078:
NRZ: 50 Kb/s to 750 Mb/s.
RZ, R1, Pulse Mode: 50 Kb/s to 375 Mb/s.
DTG5274:
NRZ: 50 Kb/s to 2.7 Gb/s.
RZ, R1, Pulse Mode: 50 Kb/s to 1.35 Gb/s.
DTG5334:
NRZ: 50 Kb/s to 3.35 Gb/s (settable to 3.4 Gb/s)
RZ, R1, Pulse Mode: 50 Kb/s to 1.675 Gb/s (settable to 1.7 Gb/s)
Data Rate (Setting) Resolution –
Internal Clock : 8 digits.
External Clock : 4 digits.
External Phase Lock In : 4 digits.
Output Timing Controls
Delay Range –
PG Mode: 0 to 3 μs.
DG Mode:
Long Delay Off: 0 to 5 ns (NRZ, RZ, R1).
Long Delay On: NRZ:
Period ≥1.25 ns: 0 to 300 ns (Hardware sequence) or to 600 ns
(Software sequence).
Period <1.25 ns: 0 to (240 ns × period) (Hardware sequence) or to
(480 ns × period) (Software sequence).
Long Delay On: RZ/R1:
Period ≥2.5 ns: 0 to 300 ns (Hardware sequence) or to 600 ns
(Software sequence).
Period <2.5 ns: 0 to (120 ns × period) (Hardware sequence) or to
(240 ns × period) (Software sequence).
Delay Resolution –
DTG5078: 1 ps.
DTG5274/5334: 0.2 ps.
Phase Resolution – 0.1%
Differential Timing Offset Feature [between pair of two adjacent channels (Odd
and Even)] –
Range: -1.0 to 1.0 ns.
Resolution:
DTG5078: 1 ps.
DTG5274/5334: 0.2 ps.
Semiautomatic Deskew Calibration –
Range: 500 ps.
Accuracy (after skew calibration):
100 ps, slots A to D.
200 ps, slots E to H (DTG5078 only).
Duty Cycle Adjustment Range – 0 to 100% (with 0 delay setting, RZ, R1, Pulse mode
only).
Duty Cycle Adjustment Resolution – 0.1%.
Pulse Width Maximum Range – 290 ps to (period - 290 ps) (RZ, R1, Pulse mode
only).
(Range also depends on delay settings.)
Pulse Width Resolution – 5 ps.
Jitter Performance (output channels)
Clock Pattern ("1010…" clock pattern)
Random Jitter –
DTG5078: <4 ps
RMS
(at 750 Mb/s with DTGM21, 0.8 V
p-p
, delay: 0.0 ns).
DTG5274: <3 ps
RMS
(at 2.7 Gb/s with DTGM30, 0.8 V
p-p
, delay: 0.0 ns).
DTG5334: <3 ps
RMS
(at 3.35 Gb/s with DTGM30, 0.8 V
p-p
, delay: 0.0 ns).
Maximum Number of Output Channels
DTG5078* 1 DTG5274, DTG5334* 1 Number of Like
Mainframes
DTGM21 DTGM30 DTGM31
DTGM32 DTGM21 DTGM30 DTGM31
DTGM32
1 32 16 3 8 8 4
2 64 32 6 16 16 8
3 96 48 9
– – –
* 1 The DTG5078 has a limit to the number of modules that may be installed; the total must be less than 100. The coefficient for each module is shown below.
DTGM30: 8, DTGM21: 10, DTGM31: 33, DTGM32: 32
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