Diodes AZ4052 - Manual

Preliminary Datasheet
Dual 4-channel Analog Multiplexer/Demultiplexer AZ4052
Oct. 2011 Rev. 1.1 BCD Semiconductor Manufacturing Limited
1
General Description
The AZ4052 is high-speed si-gate CMOS device. The
AZ4052 is dual 4-channel analog multiplexers or
demultiplexers with common select logic. Each
multiplexer has four independent inputs/outputs (pins
nY0 to nY3) and a common input/output (pin nZ).
The common channel select logics include two digital
select inputs (pins S0 and S1) and an active LOW
enable input (pin E
___
). When pin E
___
=LOW, one of the
four switches is selected (Low-impedance On-state)
with pins S0 and S1. When pin E
___
=HIGH, all
switches are in the high-impedance Off-state,
independent of pins S0 and S1. V
CC
and GND are the
supply voltage pins for the digital control inputs (pins
S0, S1 and E
___
). The V
CC
to GND ranges are 3.0V to
10V. The analog inputs/outputs (pins nY0 to nY3 and
nZ) can swing between V
CC
as a positive limit and
V
EE
as a negative limit. V
CC
-V
EE
may not exceed 10V.
For operation as a digital multiplexer/demultiplexer,
V
EE
is connected to GND (Typically Ground).
The AZ4052 is available in standard packages of
SOIC-16 and DIP-16.
Features
• Wide Operation Voltage: ±5.0V or 10V
• Low
On-resistance:
- 55 Ω (Typ.) at V
CC
-V
EE
=5V
- 40 Ω ( Typ.) at V
CC
-V
EE
=10V
• Ultra Low THD+N:
0.003% @ 10V, 0.008% @ 5.0V
• Ultra Low Crosstalk: -120dB
• Ultra Low Noise: 6.0
μ V
RMS
• Operating Temperature: -40ºC to 85ºC
Applications
•
LCD TV/PDP TV/CRT TV
• 4:1 Multi-channel Signal Selecting
Function Table
Control Input On Channel
E
___
S1 S0
L L L nY0 nZ
L L H nY1 nZ
L H L nY2
nZ
L H H nY3 nZ
H X X None
Figure 1. Package Types of AZ4052
SOIC-16 DIP-16