Asus KFN5-D SLI - Manual (Page 86)

4-20 Chapter 4: BIOS setup
4.4.3 CPU Configuration
The items in this menu show the CPU-related information that the BIOS
automatically detects.
CPU Configuration
Module Version: 14.08
Physical Count: 2
Logical Count : 4
AMD Opteron(tm) Processor 146
Revision: CG
Cache L1: 128KB
Cache L2: 1024KB
Speed : 2000MHz
Current FSB Multiplier: 12x
Maximum FSB Multiplier: 12X
Able to Change Freq : Yes
uCode Patch Level : None Required
GART Error Reporting [Disabled]
MTRR Mapping [Continuous]
Runtime Legacy PSB [Disabled]
ACPI 2.0 Objects [Enabled]
This option should
remain disabled for
the normal operation.
The driver developer
may enable it for
testing purpose.
GART Error Reporting [Disabled]
Enables or disables the GART Error reporting feature.
Configuration options: [Disabled] [Enabled]
MTRR Mapping [Continuous]
Sets the method used for programming CPU MTRRs when 4GB or more
memory is installed on the system. When set to Discrete, the BIOS leaves
the PCI hole below the 4GB boundary undescribed. Set to Continuous to
describe the PCI hole as non-cacheable.
Configuration options: [Continuous] [Discrete]
ACPI 2.0 Objects [Enabled]
Enables or disables generation of the ACPI 2.0 objects.
Configuration options: [Disabled] [Enabled]