Asus A7VI-VM - Manual (Page 96)

ASUS A7VI-VM User’s Manual 90
7. APPENDIX
7. APPENDIX
Glossary
IDE (Integrated Drive Electronics)
IDE devices integrate the drive control circuitry directly on the drive itself, eliminating the need for a separate adapter card (in the
case for SCSI devices). UltraDMA/33 IDE devices can achieve up to 33MB/Sec transfer.
LPT Port (Line Printer Port)
Logical device name reserved by DOS for the computer parallel ports. Each LPT port is configured to use a different IRQ and
address assignment.
MMX
A set of 57 new instructions based on a technique called Single Instruction, Multiple Data (SIMD), which is built into the new
Intel Pentium PP/MT (P55C) and Pentium II (Klamath) CPU as well as other x86-compatible microprocessors. The MMX
instructions are designed to accelerate multimedia and communications applications, such as 3D video, 3D sound, video confer-
ence.
PC100
SDRAM is Intel's goal is to ensure that memory subsystems continue to support evolving platform requirements and to assure that
memory does not become a bottleneck to system performance. It is especially important to ensure that the PC memory roadmap
evolves together with the performance roadmaps for the processors, I/O and graphics.
PCI Bus (Peripheral Component Interconnect Local Bus)
PCI bus is a specification that defines a 32-bit data bus interface. PCI is a standard widely used by expansion card manufacturers.
PCI Bus Master
The PCI Bus Master can perform data transfer without local CPU help and furthermore, the CPU can be treated as one of the Bus
Masters. PCI 2.1 supports concurrent PCI operation to allow the local CPU and bus master to work simultaneously.
Plug and Play BIOS
The ISA bus architecture requires the allocation of memory and I/O address, DMA channels and interrupt levels among multiple
ISA cards. However, configuration of ISA cards is typically done with jumpers that change the decode maps for memory and I/O
space and steer the DMA and interrupt signals to different pins on the bus. Further, system configuration files may need to be
updated to reflect these changes. Users typically resolve sharing conflicts by referring to documentation provided by each manu-
facturer. For the average user, this configuration process can be unreliable and frustrating. Plug and play (PnP) BIOS eliminates
the ISA add-on card hardware conflict problem. The PnP BIOS uses a memory block to define and remember each card's configu-
ration, which allows the user to change the card's IRQs and DMA in BIOS either automatically or manually.
POST (Power On Self Test)
When you turn ON the computer, it will first run through the POST, a series of software-controlled diagnostic tests. The POST
checks system memory, the motherboard circuitry, the display, the keyboard, the diskette drive, and other I/O devices.
PS/2 Port
PS/2 ports are based on IBM Micro Channel Architecture. This type of architecture transfers data through a 16-bit or 32-bit bus.
A PS/2 mouse and/or keyboard may be used on ATX motherboards.
ROM (Read Only Memory)
ROM is nonvolatile memory used to store permanent programs (called firmware) used in certain computer components. Flash
ROM (or EEPROM) can be reprogrammed with new programs (or BIOS).
SCSI (Small Computer System Interface)
High speed multi-threaded I/O interface defined by the X3T9.2 committee of the American National Standards Institute (ANSI)
for connecting many peripheral devices. The standard started from 10MBytes/sec to 160MBytes/sec available today.
SDRAM (Synchronous DRAM)
The SDRAM features a fully synchronous operation referenced to a positive edge clock whereby all operations are synchronized
at a clock input which enables the coexistence of high performance and a simple user interface. SDRAM takes memory access
away from the CPU's control; internal registers in the chips accept the request, and let the CPU do something else while the data
requested is assembled for the next time the CPU talks to the memory. As they work on their own clock cycle, the rest of the
system can be clocked faster. There is a version optimized for video cards, and main memory for motherboards.
SPD for SDRAM module
Serial Presence Detect (SPD) is most like an ID detect for SDRAM module, it using an EEPROM component on DIMM module
for storing module configuration information inside. The Serial Presence Detect function is implemented using a 2048 bit EEPROM
component. This nonvolatile storage device contains data programmed by the DIMM manufacturer that identifies the module
type and various SDRAM organization and timing parameters.
System Disk
A system disk contains the core file of an operating system and is used to boot up the operating system.
UltraDMA
Ultra DMA/33 is a "synchronous DMA" protocol designed by Intel. This function is included into Intel's PIIX4 chipset. The
traditional IDE transfer only uses one edge of the data stroke as the data transfer. Ultra DMA/33 uses both edges of data strobe
when the data is transferred. Hence, the data transfer rate is double of the PIO mode 4 or DMA mode 2 (16.6MB/s x2 = 33MB/s)
on ATA-2 devices.
Ultra ATA/66, also known as Ultra DMA/66, is an extension of current Ultra ATA/33 interface. This high-speed interface has
doubled the Ultra ATA/33 burst data transfer rate to 66.6 Mbytes/sec and maximized disk performance under current PCI local
bus environment
USB (Universal Serial Bus)
A 4-pin serial cable bus that allows up to 127 plug and play computer peripherals such as keyboard, mouse, joystick, scanner,
printer, modem, and monitor to share a bandwidth through a host scheduled token based protocol. This allows attaching or
detaching while the host and other peripherals are in operation. Supports synchronous and asynchronous transfer types over the
same set of wires up to 12Mbit/sec. USB 2.0 provides twice the transfer rate compared to USB 1.0 and competes with the 1394
standard.
Wake-On-LAN
Computer will automatically wake-up upon receiving a wake-up packet through a Network interface when it is under power soft-
off, suspend or sleep mode.