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Q-tech, Flat pack, Frequency vs. temperature curve – Q-Tech QT28 User Manual

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Q-TECH Corporation - 10150 W. Jefferson Boulevard, Culver City 90232 - Tel: 310-836-7900 - Fax: 310-836-2157 - www.q-tech.com

FLAT PACK

CRYSTAL CLOCK OSCILLATORS

-5.2 to -4.5Vdc & 1.8 to 15Vdc - 0.12Hz to 200MHz

Flat Pack (Revision F, August 2010 ) (ECO# 9934)

Q-TECH

CORPORATION

Vdd

GND

0.1xVdd

0.9xVdd

VOH

VOL

Tr

Tf

TH

T

0.5xVdd

SYMMETRY = x 100%

TH

T

Ts

Start-up box

Oscilloscope

DUT

Variable Ramp

54616B Agilent

TYPICAL SET-UP FOR START-UP TIME

Output Waveform (Typical)

Startup Time

Supply Current

Test Circuit

-

-

Output

Ground

Vdd Out

GND

0.1µF

15pF

E/D

Tristate Function

Power
supply

10k

mA

Vdc

+

+

+

(*)

or

0.01µF

(*) CL includes probe and jig capacitance

Typical test circuit for CMOS logic

0

5

10

15

20

25

30

35

40

45

0.5

2

8

16 24 27 32 36

40 48 50 55 65

70 75 85 100 125 133 150 160

Freq(MHz)

Icc (mA)

TYPICAL SUPPLY CURRENT ICC (mA) AT 3.3Vdc & 5.0Vdc CMOS Logic NO LOAD

Icc 3.3V

Icc 5V

POWER

SUPPLY

+

-

mA

0.1µF

Vdc

-

Vdd OUT

OUT

GND

Typical test circuit for TTL logic.

0.01µF

Rs

(*) CL inclides the loading effect of the oscilloscope probe.

E/D

CL

+

+

-

RL

LOAD

6 TTL

10 TTL

CL(*)

12pF

20pF

RL

430Ω

270Ω

RS

10kΩ

6kΩ

or

Vdd

POWER

SUPPLY

+

-

mA

Vdc

+

-

GND

OUT

OUT

Vee

Typical test circuit for ECL logic.

0.1µF

or

0.01µF

50Ω

-2Vdc

-4.5V

or

-5.2V

The Tristate function on pin 1 has a built-in pull-up resistor typical 50kΩ, so it
can be left floating or tied to Vdd without deteriorating the electrical performance.

Frequency vs. Temperature Curve

FREQUENCY STABILITY VERSUS TEMPERATURE QT24T- 48.000MHz

-50

-40

-30

-20

-10

0

10

20

30

40

50

-55

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

5

10

15

20

25

30

35

40

45

50

55

60

65

70

75

80

85

90

95

100 105 110 115 120 125

Temperature (°C)

Frequency Stability (PPM)

2_5

3_5

4_5

5_5