Rainbow Electronics DS1870 - Manual (Page 23)

DS1870
LDMOS RF Power-Amplifier Bias
Controller
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T Index <00h> Holds the calculated index based on the temperature measurement. This
index is used to address LUTs 2 and 3.
O1 Index <00h> Holds the calculated index based on the V
D
or I
D1
measurement (dependant
on ‘LUT Sel’ byte). This index is used to address LUT 4.
O2 Index <00h> Holds the calculated index based on the V D or I D2 measurement (dependant
on ‘LUT Sel’ byte). This index is used to address LUT 5.
POT1 base <00h> The base value used for POT1 and recalled from Table 2 at the memory
address found in ‘T Index.’ This register is updated at the end of the temperature conversion.
POT1 is not updated with this value until the end of I
D2 conversion to ensure that both the base
and the offset are known for POT1 and POT2 and they are updated simultaneously.
POT1 off <00h> The offset value used for POT1 and recalled from Table 4 at the memory
address found in ‘O1 Index.’ Depending on the value written to ‘LUT Sel’ byte, this register is
updated at the end of the V
D
or I
D1
conversion. POT1 is not updated with this value until the end
of I
D2
conversion to ensure that both the base and the offset are known for POT1 and POT2 and
they are updated simultaneously.
POT2 base <00h> The base value used for POT2 and recalled from Table 3 at the memory
address found in ‘T Index.’ This register is updated at the end of the temperature conversion.
POT2 is not updated with this value until the end of I
D2 conversion to ensure that both the base
and the offset are known for POT1 and POT2 and they are updated simultaneously.
POT2 off <00h> The Offset value used for POT2 and recalled from Table 5 at the memory
address found in ‘O2 Index.’ Depending on the value written to ‘LUT Sel’ byte, this register is
updated at the end of the V
D or I D2 conversion. POT2 is not updated with this value until the end
of I D2 conversion to ensure that both the base and the offset are known for POT1 and POT2 and
they are updated simultaneously.
MAN Dac <03h> Allows user to control either the LUT Index or the base and offset values
used to calculate the potentiometer positions.
a) SEE Shadow EE bar. At power-on this bit is low, which enables EE writes to all shadowed
EE locations. If written to a one, this bit allows for trimming and/or configuring the part
without changing the NV-shadowed EE memory and not having to wait for the EE
cycle time to complete. Writing this bit to a zero does not cause a write from the SRAM
to copy into the EE. Shadow EE locations are addresses 20h to 3Fh and Table 180h
to A7h.
b) B/O_en At power-on this bit is high, which enables auto control of the LUT. If this bit is written
to a zero, then the POT base and offset are writeable by the user and the LUT recalls
are disabled. This allows the user to interactively test their modules by writing the
base and/or offsets for the POTs. The POTs update with the new value at the end of
the write cycle. Thus, all four registers (‘POT1 Base,’ ‘POT1 Off,’ ‘POT2 Base,’ and
‘POT2 OFF’) should be written in the same write cycle. The I
2 C stop condition is the
end of the write cycle.
c) Index_en At power-on this bit is high, which enables auto control of the LUT. If this bit is cleared
to a zero, then the three index values (‘T index,’ ‘O1 Index,’ and ‘O2 Index’) are write-
able by the user and the updates of calculated indexes are disabled. This allows the
user to interactively test their modules by controlling the indexing for the lookup
tables. All three index values should be written in the same write cycle. The recalled
values from the LUTs appear in the base and offset register after each corresponding
conversion (just like it would happen in auto mode). To ensure the recalled base and
offset values from the LUT are updated, the base and offset calculation will not update
the potentiometers until the completion of the next temperature and I
D2
conversion.
Both pots update at the same time (just like it would happen in auto mode).