Rainbow Electronics DS1393 - Manual (Page 12)

DS1390/DS1391/DS1392/DS1393
However, when V CC falls below V PF , the internal clock
registers are blocked from any access. If V PF is less
than V BACKUP , the device power is switched from V CC
to V BACKUP when V CC drops below V PF . If V PF is
greater than V
BACKUP
, the device power is switched
from V CC to V BACKUP when V CC drops below
V BACKUP . The registers are maintained from the
V BACKUP source until V CC is returned to nominal levels.
See the Functional Diagram for the main elements of
these serial RTCs.
Oscillator Circuit
All four devices use an external 32.768kHz crystal. The
oscillator circuit does not require any external resistors
or capacitors to operate. Table 1 specifies several crys-
tal parameters for the external crystal, and Figure 7
shows a functional schematic of the oscillator circuit. If
a crystal is used with the specified characteristics, the
startup time is usually less than one second.
Clock Accuracy
The accuracy of the clock is dependent upon the accu-
racy of the crystal and the accuracy of the match
between the capacitive load of the oscillator circuit and
the capacitive load for which the crystal was trimmed.
Additional error is added by crystal frequency drift
caused by temperature shifts. External circuit noise
coupled into the oscillator circuit can result in the clock
running fast. Figure 8 shows a typical PC board layout
for isolation of the crystal and oscillator from noise.
Refer to Application Note 58: Crystal Considerations
with Dallas Real-Time Clocks for detailed information.
Low-Voltage SPI/3-Wire RTCs with
Trickle Charger
12 ____________________________________________________________________
PARAMETER SYMBOL MIN TYP MAX UNITS
Nominal Frequency f O 32.768 kHz
Series Resistance ESR 55 k Ω
Load Capacitance C L 6 pF
COUNTDOWN
CHAIN
X1 X2
CRYSTAL
C L 1 C L 2 RTC REGISTERS
DS139x
Table 1. Crystal Specifications*
*The crystal, traces, and crystal input pins should be isolated
from RF generating signals. Refer to Application Note 58:
Crystal Considerations for Dallas Real-Time Clocks for addi-
tional specifications.
Figure 7. Oscillator Circuit Showing Internal Bias Network
LOCAL GROUND PLANE (LAYER 2)
CRYSTAL
GND
X2
X1
NOTE: AVOID ROUTING SIGNAL LINES
IN THE CROSSHATCHED AREA
(UPPER LEFT QUADRANT) OF
THE PACKAGE UNLESS THERE IS
A GROUND PLANE BETWEEN THE
SIGNAL LINE AND THE DEVICE PACKAGE.
Figure 8. Layout Example