Rainbow Electronics ATmega32L - Manual (Page 50)

50
ATmega32(L)
2503C–AVR–10/02
succeeding positive clock edge. As indicated by the two arrows t
pd,max
and t
pd,min
, a
single signal transition on the pin will be delayed between ½ and 1½ system clock
period depending upon the time of assertion.
When reading back a software assigned pin value, a nop instruction must be inserted as
indicated in Figure 25. The out instruction sets the “SYNC LATCH” signal at the positive
edge of the clock. In this case, the delay t
pd
through the synchronizer is one system
clock period.
Figure 25. Synchronization when Reading a Software Assigned Pin Value
nop in r17, PINx
0xFF
0x00 0xFF
t
pd
out PORTx, r16
SYSTEM CLK
r16
INSTRUCTIONS
SYNC LATCH
PINxn
r17