Rainbow Electronics AT88SA100S - Manual (Page 6)

6
AT88SA100S [Preliminary]
8558A–SMEM–03/09
Table 3. AC Parameters
Parameter Symbol Direction Min Typ Max Unit Notes
Wake Low
Duration t
WLO
To
CryptoAuthentication 60 - μs Signal can be stable in either high or low
levels during extended sleep intervals.
Wake Delay to
Data Comm. t
WHI
To
CryptoAuthentication 1 - ms Signal should be stable high for this
entire duration.
Start pulse
duration t
START
To
CryptoAuthentication 4.1 4.34 4.56 μs
From
CryptoAuthentication 4.62 6.0 8.6 μs
Zero
transmission
high pulse t
ZHI
To
CryptoAuthentication 4.1 4.34 4.56 μs
From
CryptoAuthentication 4.62 6.0 8.6 μs
Zero
transmission
low pulse t
ZLO
To
CryptoAuthentication 4.1 4.34 4.56 μs
From
CryptoAuthentication 4.62 6.0 8.6 μs
Bit time (1) t
BIT
To
CryptoAuthentication 37.1 39 - μs If the bit time exceeds t
TIMEOUT
then
CryptoAuthentication will enter sleep
mode and the wake token must be
resent.
From
CryptoAuthentication 46.2 60 86 μs
Turn around
delay t
TURNAROUND
From
CryptoAuthentication 46.2 60 86 μs CryptoAuthentication will initiate the first
low going transition after this time interval
following the end of the Transmit flag
To
CryptoAuthentication 46.2 60 86 μs After CryptoAuthentication transmits the
last bit of a block, system must wait this
interval before sending the first bit of a
flag
High side
glitch filter @
active t
HIGNORE_A
To
CryptoAuthentication 45 ns Pulses shorter than this in width will be
ignored by the chip, regardless of its
state when active
Low side glitch
filter @ active t
LIGNORE_A
To
CryptoAuthentication 45 ns Pulses shorter than this in width will be
ignored by the chip, regardless of its
state when active
High side
glitch filter @
sleep t
HIGNORE_S
To
CryptoAuthentication 2 μs Pulses shorter than this in width will be
ignored by the chip when in sleep mode
Low side glitch
filter @ sleep t
LIGNORE_S
To
CryptoAuthentication 2 μs Pulses shorter than this in width will be
ignored by the chip when in sleep mode
IO Timeout t
TIMEOUT
To
CryptoAuthentication 7 10 13 ms Starting as soon as 7ms up to 13ms after
the initial signal transition of a token chip
will enter sleep if no complete and valid
token is received.
Watchdog
reset t
WATCHDOG
To
CryptoAuthentication 374 500 650 ms Max. time from wake until chip is forced
into sleep mode. Refer to Watchdog
Failsafe Section 3.4
Note 1: START, ZLO, ZHI & BIT are designed to be compatible with a standard UART running at 230.4K baud for both
transmit and receive.