Rainbow Electronics DS2890 - Manual (Page 20)

DS2890
20 of 28
b) Write-zero Time Slot
15µs
RESISTOR
MASTER
(OD: 2µs)
DS2890
60µs
t
LOW0
Sampling Window
(OD: 6µs)
REGULAR SPEED OVERDRIVE SPEED
60 µs £ t
LOW0
< t
SLOT
< 120 µs
1 µs £ t
REC
<
¥
6 µs £ t
LOW0
< t
SLOT
< 16 µs
1 µs £ t
REC
<
¥
V
PULLUP
V
PULLUP MIN
V
IH MIN
V
IL MAX
0V
t
SLOT
t
REC
c) Read-data Time Slot
RESISTOR
MASTER
DS2890
Master
Sampling Window
REGULAR SPEED OVERDRIVE SPEED
60 µs £ t
SLOT
< 120 µs
1 µs £ t
LOWR
< 15 µs
0 £ t
RELEASE
< 45 µs
1 µs £ t
REC
<
¥
t
RDV
= 15 µs
t
SU
< 1 µs
6 µs £ t
SLOT
< 16 µs
1 µs £ t
LOWR
< 2 µs
0 £ t
RELEASE
< 4 µs
1 µs £ t
REC
<
¥
t
RDV
= 2 µs
t
SU
< 1 µs
V
PULLUP
V
PULLUP MIN
V
IH MIN
V
IL MAX
0V
t
SLOT
t
REC
t
LOWR
t
SU
t
RDV
t
RELEASE
*The optimal sampling point for the master is as close as possible to the end time of the t
RDV
period
without exceeding t
RDV
. For the case of a Read-one time slot, this maximizes the amount of time for the
pull-up resistor to recover the line to a high level. For a Read-zero time slot it ensures that a read will
occur before the fastest 1-Wire device(s) release the line (t
RELEASE
= 0).