Xilinx ML605 - Manual (Page 53)

ML605 Hardware User Guide www.xilinx.com 53
UG534 (v1.8) October 2, 2012
Detailed Description
User SMA GPIO
The ML605 includes an pair of SMA connectors for GPIO as described in Figure 1-21 and
Table 1-24 .
X-Ref Target - Figure 1-21
Figure 1-21: User SMA GPIO
UG534_21_072109
USER SMA GPIO N
J56 32K10K-400E3
J76 32K10K-400E3
GND1
SIG
1
1
SIG
GND2
GND3
GND4
GND5
GND6
GND7
GND1
GND2
GND3
GND4
GND5
GND6
GND7
USER SMA GPIO P
2
3
4
5
6
7
8
2
3
4
5
6
7
8
Table 1-24: User SMA Connections
U1 FPGA Pin Schematic Net Name SMA Pin
W34 USER_SMA_GPIO_N J56.1
V34 USER_SMA_GPIO_P J57.1