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Texas Instruments MSP-FET430 User Manual

Page 79

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80-pin MSP430F44x and MSP430F43x Device Emulation

D-3

P5.5/R13 49 57
P5.6/R23 50 58
P5.7/R33 51 59
DVcc2

52 60

DVss2

53 61

P2.5/URXD0 54

74†

P2.4/UTXD0

55 75

P2.3.TB2 56 76
P2.2/TB1 57 77
P2.1/TB0 58 78
P2.0/TA2 59 79
P1.7/CA1 60 80
P1.6/CA0 61 81
P1.5/TACLK/ACLK

62 82

P1.4/TBCLK/SMCLK

63 83

P1.3/TBOUTH/SVSOUT

64 84

P1.2/TA1 65 85
P1.1/TA0/MCLK

66 86

P1.0/TA0 67 87
XT2OUT 68 88
XT2IN

69 89

TDO/TDI 70 90
TDI

71 91

TMS

72 92

TCK

73 93

RST/NMI 74 94
P6.0/A0 75 95
P6.1/A1 76 96
P6.2/A2 77 97
Avss

78 98

DVss1

79 99

Avcc 80

100

Note discontinuity of pin numbering sequence