Texas Instruments TMS320C642X - Manual (Page 8)

ICXSR ICDXR
ICRSR ICDRR
Clock
synchronizer
Prescaler
Noise filters
Arbitrator
I2C INT
ICREVT
Peripheral data bus
Interrupt
to CPU
Sync events to
EDMA controller
SDA
SCL
Control/status
registers
CPU
EDMA
I2C peripheral
ICXEVT
Introduction www.ti.com
1.3 Functional Block Diagram
A block diagram of the I2C peripheral is shown in Figure 1 . Refer to Section 2 for detailed information
about the architecture of the I2C peripheral.
Figure 1. I2C Peripheral Block Diagram
1.4 Industry Standard(s) Compliance Statement
The I2C peripheral is compliant with the Philips Semiconductors Inter-IC bus (I2C-bus) specification
version 2.1.
8 Inter-Integrated Circuit (I2C) Peripheral SPRUEN0D – March 2011
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