Texas Instruments TMS320C642X - Manual (Page 5)

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List of Tables
1 Operating Modes of the I2C Peripheral ................................................................................ 15
2 Ways to Generate a NACK Bit
...........................................................................................
16
3 Descriptions of the I2C Interrupt Events
................................................................................
21
4 Inter-Integrated Circuit (I2C) Registers ................................................................................. 22
5 I2C Own Address Register (ICOAR) Field Descriptions ............................................................. 23
6 I2C Interrupt Mask Register (ICIMR) Field Descriptions ............................................................. 24
7 I2C Interrupt Status Register (ICSTR) Field Descriptions
............................................................
25
8 I2C Clock Low-Time Divider Register (ICCLKL) Field Descriptions
................................................
28
9 I2C Clock High-Time Divider Register (ICCLKH) Field Descriptions ............................................... 28
10 I2C Data Count Register (ICCNT) Field Descriptions ................................................................ 29
11 I2C Data Receive Register (ICDRR) Field Descriptions ............................................................. 30
12 I2C Slave Address Register (ICSAR) Field Descriptions
............................................................
30
13 I2C Data Transmit Register (ICDXR) Field Descriptions
.............................................................
31
14 I2C Mode Register (ICMDR) Field Descriptions ....................................................................... 32
15 Master-Transmitter/Receiver Bus Activity Defined by RM, STT, and STP Bits ................................... 34
16 How the MST and FDF Bits Affect the Role of TRX Bit .............................................................. 35
17 I2C Interrupt Vector Register (ICIVR) Field Descriptions
............................................................
36
18 I2C Extended Mode Register (ICEMDR) Field Descriptions
.........................................................
37
19 I2C Prescaler Register (ICPSC) Field Descriptions ................................................................... 38
20 I2C Peripheral Identification Register 1 (ICPID1) Field Descriptions ............................................... 39
21 I2C Peripheral Identification Register 2 (ICPID2) Field Descriptions ............................................... 39
22 Document Revision History
..............................................................................................
40
5 SPRUEN0D – March 2011 List of Tables
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