Renesas Single-Chip Microcomputer H8/36079 - Manual (Page 22)

9.2. Application Headers
Table 9-5 and below Table 9-6 show the standard application header connections.
JA1
Pin Generic Header Name CPU board
Signal Name
Device
Pin
Pin Header Name CPU board
Signal Name
Device
Pin
1 5V CON_5V - 2 0V GROUND -
3 3V3 CON_3V3 - 4 0V GROUND -
5 AVCC CON_AVCC 3 6 AVss NC -
7 AVref CON_AVREF - 8 ADTRG ADTRGn 22
9 AD0 AN0 62 10 AD1 AN1 61
11 AD2 AN2 60 12 AD3 AN3 59
13 DAC0 NC - 14 DAC1 NC -
15 IO_0 IO_0 58 16 IO_1 IO_1 57
17 IO_2 IO_2 56 18 IO_3 IO_3 55
19 IO_4 IO_4 15 20 IO_5 IO_5 16
21 IO_6 IO_6 17 22 IO_7 IO_7 18
23 IRQ3 WKP 22 24 IIC_EX NC -
25 IIC_SDA SDA 26 26 SCL SCL 27
Table 9-5: JA1 Standard Generic Header
JA2
Pin Generic Header Name CPU board
Signal Name
Device
Pin
Pin Header Name CPU board
Signal Name
Device
Pin
1 RESn RESn 7 2 EXTAL CON_OSC1 11
3 NMIn NMIn 35 4 VSS1 GROUND -
5 WDT_OVF - - 6 SCIaTX TXD2 50
7 IRQ0 IRQ0 51 8 SCIaRX RXD2 49
9 IRQ1 IRQ1 52 10 SCIaCK SCK3_2 48
11 UD UD 36 12 CTS/RTS NC -
13 Up Up 34 14 Un Un 32
15 Vp Vp 37 16 Vn Vn 39
17 Wp Wp 38 18 Wn Wn 40
19 TMR0 TMR0 30 20 TMR1 TMR1 33
21 TRIGa TRIGa 28 22 TRIGb TRIGb 29
23 IRQ2 IRQ2n 53 24 TRISTn TRISTn 24
25 - - 26 - - -
Table 9-6: JA2 Standard Generic Header
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