NEC uPD78056Y - Manual (Page 30)

30
LIST OF FIGURES (6/8)
Figure No. Title Page
17-26. Slave Wait Release (Reception) .................................................................................................... 387
17-27. SCK0/SCL/P27 Pin Configuration ................................................................................................. 390
17-28. SCK0/SCL/P27 Pin Configuration ................................................................................................. 390
17-29. Logic Circuit of SCL Signal ............................................................................................................ 391
18-1. Serial Interface Channel 1 Block Diagram .................................................................................... 395
18-2. Timer Clock Select Register 3 Format ........................................................................................... 398
18-3. Serial Operation Mode Register 1 Format ..................................................................................... 399
18-4. Automatic Data Transmit/Receive Control Register Format .......................................................... 400
18-5. Automatic Data Transmit/Receive Interval Specify Register Format ............................................. 401
18-6. 3-Wire Serial I/O Mode Timings .................................................................................................... 407
18-7. Circuit of Switching in Transfer Bit Order ...................................................................................... 408
18-8. Basic Transmission/Reception Mode Operation Timings .............................................................. 417
18-9. Basic Transmission/Reception Mode Flowchart ............................................................................ 418
18-10. Buffer RAM Operation in 6-Byte Transmission/Reception (in Basic Transmit/Receive Mode) ...... 419
18-11. Basic Transmission Mode Operation Timings ............................................................................... 421
18-12. Basic Transmission Mode Flowchart ............................................................................................. 422
18-13. Buffer RAM Operation in 6-Byte Transmission (in Basic Transmit Mode) ..................................... 423
18-14. Repeat Transmission Mode Operation Timing .............................................................................. 425
18-15. Repeat Transmission Mode Flowchart .......................................................................................... 426
18-16. Buffer RAM Operation in 6-Byte Transmission (in Repeat Transmit Mode) .................................. 427
18-17. Automatic Transmission/Reception Suspension and Restart ........................................................ 429
18-18. System Configuration When the Busy Control Option is Used ..................................................... 430
18-19. Operation Timings when Using Busy Control Option (BUSY0 = 0) ............................................... 431
18-20. Busy Signal and Wait Cancel (when BUSY0 = 0) ......................................................................... 432
18-21. Operation Timings when Using Busy & Strobe Control Option (BUSY0 = 0) ................................ 433
18-22. Operation Timing of the Bit Slippage Detection Function Through the Busy SIgnal
(when BUSY0 = 1) ......................................................................................................................... 434
18-23. Automatic Data Transmit/Receive Interval .................................................................................... 435
18-24. Operation Timing with Automatic Data Transmit/Receive Function Performed by
Internal Clock ................................................................................................................................ 436
19-1. Serial Interface Channel 2 Block Diagram .................................................................................... 441
19-2. Baud Rate Generator Block Diagram ............................................................................................ 442
19-3. Serial Operating Mode Register 2 Format ..................................................................................... 444
19-4. Asynchronous Serial Interface Mode Register Format .................................................................. 445
19-5. Asynchronous Serial Interface Status Register Format ................................................................ 447
19-6. Baud Rate Generator Control Register Format ............................................................................. 448
19-7. Asynchronous Serial Interface Transmit/Receive Data Format ..................................................... 461
19-8. Asynchronous Serial Interface Transmission Completion Interrupt Request Generation Timing .. 463
19-9. Asynchronous Serial Interface Reception Completion Interrupt Request Generation Timing ....... 464
19-10. Receive Error Timing ..................................................................................................................... 465
19-11. The State of Receive Buffer Register (RXB) and Whether the Receive Completion
Interrupt Request (INTSR) is Generated ....................................................................................... 466