National Instruments 6508 PCI-DIO-96 - Manual (Page 88)

Index
© National Instruments Corporation I -3 PCI-DIO-96 User Manual
DPA<7..0> signal (table), 3-5
DPB<7..0> signal (table), 3-4
DPC<7..0> signal (table), 3-4
E
electronic support services, D-1 to D-2
e-mail support, D-2
environment specifications, A-2
equipment, optional, 1-5
F
fax and telephone support, D-2
FaxBack support, D-2
FTP support, D-1
fuse, automatic reset, 3-8
G
Get_DAQ_device_Info call for simple
accesses, 6-5
GND signal (table), 3-4
H
hardware installation, 2-1
I
IBF signal
description (table), 3-8
Mode 1 input timing (figure), 3-10
Mode 2 bidirectional timing (figure), 3-12
IBFA bit
Mode 1 strobed input, 6-12
Mode 2 bidirectional bus, 6-18
IBFB bit, 6-12
installation
hardware, 2-1
software, 2-1
unpacking the PCI-DIO-96, 1-6
INTE1 bit, 6-18
INTE2 bit, 6-18
INTEA bit
Mode 1 strobed input, 6-12
Mode 1 strobed output, 6-15
INTEB bit
Mode 1 strobed input, 6-12
Mode 1 strobed output, 6-15
INTEN bit, 5-9
interrupt control circuitry
block diagram, 4-4
theory of operation, 4-3
Interrupt Control Register Group
address map (table), 5-3
Interrupt Clear Register, 5-10
Interrupt Control Register 1, 5-7 to 5-8
Interrupt Control Register 2, 5-9
interrupt generation
developing your own driver, 6-5 to 6-6
simple access with
Get_DAQ_device_Info, 6-5
using NI-DAQ software, 6-4 to 6-5
interrupt handling, 6-20 to 6-21
82C53 programming example, 6-22 to
6-23
82C55A programming examples, 6-20 to
6-21
INTR signal
description (table), 3-9
Mode 1 input timing (figure), 3-10
Mode 1 output timing (figure), 3-11
Mode 2 bidirectional timing (figure), 3-12
INTRA bit
Mode 1 strobed input, 6-12
Mode 1 strobed output, 6-15
Mode 2 bidirectional bus, 6-18
INTRB bit
Mode 1 strobed input, 6-12
Mode 1 strobed output, 6-15
I/O bit
Mode 1 strobed input, 6-12