Nvidia TEGRA DG-04927-001_V01 - Manual (Page 37)

Tegra 200 Series Developer Board User Guide
DG-04927-001_v01 Advance Information – Subject to Change 37
NVIDIA CONFIDENTIAL
4.9.4 Strapping Pins
Straps must be stable from the rising edge of SYS_RESET_N until 12.5us afterward.
Figure 26. Power-on Strapping Connections
Table 14. Power-on Strapping Breakdown
Strap Options Strap Pins Description
USB_RECOVERY GMI_OE_N 0: USB Recovery Mode
1: Boot from secondary device
JTAG_ARM[1:0] GMI_CLK, GMI_ADV_N 00: Serial JTAG chain, MPCORE and AVP
RAM_CODE[3:0] GMI_AD[7:4] SW uses to determine which BCT table to use for DRAM, NAND timing
BOOT_SELECT_CODE[3:0] GMI_AD[15:12] Selects Boot device - depends on how Boot fuses are burned