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4 i2s master mode and i2c control mode, Tf a9812, Nxp semiconductor s – NXP Semiconductors TFA9812 User Manual

Page 55: S master mode and i, C control mode, Btl stereo class-d audio amplifier with i, S input, Fig 16. simplified application diagram for i

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TF
A9812_2

© NXP B

.V

. 2009. All r

ights reser

v

ed.

Preliminar

y data sheet

Re
v

. 02 — 22 Jan

uar

y 2009

55 of 66

NXP Semiconductor

s

TF
A9812

BTL stereo Class-D audio amplifier with I

2

S input

14.4.4 I

2

S master mode and I

2

C control mode

Fig 16. Simplified application diagram for I

2

S master mode and I

2

C control mode

TFA9812

ADSEL1/PLIM1

OUT1N

OUT1N

BOOT2P

OUT2P

OUT2P

V

DDP

V

DDP

OUT1P

OUT1P

BOOT1P

OUT2N

OUT2N

ADSEL2/PLIM2

XT

ALIN

XT

ALOUT

V

DD

A(3V3)

ST

ABA

REF

A

V

DD

A

TEST1

V

SS1

ST

AB2

V

SSP2

V

SSP2

BOO

T2N

CSEL

GAIN

ENABLE

AV

O

L

PO

WER

UP

CDELA

Y

DIA

G

ST

AB1

V

SSP1

V

SSP1

BOO

T1N

SCL/SFOR

SDA/MS

V

DDD(3V3)

STABD

REFD

TEST2

DATA

WS

BCK

MCLK

V

SS2

EXPOSED DIE PADDLE

36

37

38

39

40

41

42

43

44

45

46

47

48

35

34

33

32

31

30 29

28

27

26

25

ENABLE

POWERUP

DIAGNOSTIC

CDELAY

1 nF

CSTAB
100 nF

I

2

C SCL

I

2

C SDA

I

2

S DATA

I

2

S WS

I

2

S BCK

I

2

S MLCK

VDDD

CVDDD

100 nF

CSTABD
1

µ

F

CVDDA
100 nF

3.3 V

VPA

CSTAB
100 nF

CVPA
100 nF

CSTAB
100 nF

1

2

3

4

5 6

7

8

9

10 11

12

010aaa479

CBOOT
15 nF

CSN
470 pF

CSN
470 pF

CLC
680 nF

CLC
680 nF

CBOOT
15nF

RSN 10

RSN 10

CLC
680 nF

CLC
680 nF

Lic

S2

F2

S1

F1

15

µ

H

24

23

22

21

20

19

18

17

16

15

14

13

CVDDP

CVDDP

VP

OUT1

+

6

to 8

OUT2

+

6

to 8

CBOOT
105 nF

CBOOT
15 nF

F2

S2

F1

S1

15

µ

H

Lic

RSN 10

RSN 10

CSN

470 pF

CSN

470 pF

3.3 V

XTALL

CXTALL
18 pF

CXTALL
18 pF

POWER IN

V

P

= 8 V to 20 V

GND

CVDDP
220

µ

F / 25 V

RVDDA

10

VPA

VP

100 nF

100 nF

RSTABA
1 k