PACKARD BELL LJ77 - Manual (Page 27)

Chapter 1 17
Hardware Specifications and Configurations
Processor
Processor Specifications
CPU Fan True Value Table)
Item Specification
CPU Intel Mobile Calpella rPGA988A
Core Logic Intel Ibex Peak-M (HM55)
Power See table below
On-die Cache • A 32-KB instruction and 32-KB data first-level cache (L1) for each core
• A 256-KB shared instruction/data second-level cache (L2) for each core
• Up to 4-MB shared instruction/data third-level cache (L3), shared among all
cores
Front Side Bus See table below
Item
CPU
Speed
Cores
Bus
Speed
Cache
Size
Package
Core
Voltage
Acer P/N
Ci3330M 2.13 GHz 2 330 M 3 MB PGA 35 W KC.33001.DMP
Ci3350M 2.26 GHz 2 350 M 3 MB PGA 35 W KC.35001.DMP
Ci5430M 2.26 GHz 2-4 430 M 3 MB PGA 35 W KC.43001.DMP
Ci5520M 2.4 GHz 2-4 520 M 3 MB PGA 35 W KC.52001.DMP
Ci5540M 2.53 GHz 2-4 540 M 3 MB PGA 35 W KC.54001.DMP
Ci7620M 2.66 GHz 4 620 M 4 MB PGA 35 W KC.62001.DMP
(DIS)
CPU Temperature
Fan Speed
(RPM)
SPL Spec
(dBA)
Core 0 Core 1 Core 2 Core 3
48 48 48 48 2400 28
60 60 60 60 2900 31
70 70 70 70 3100 34
85 85 85 85 3400 37
99 99 99 99 3700 40
104 104 104 104 3700 40
Throttling 50%: On= 99°C; OFF=88°C
OS shut down at 104°C; H/W shut down at 92°C
(UMA)
CPU Temperature
Fan Speed (RPM) SPL Spec (dBA)
Core 0 Core 1 Core 2 Core 3
48 48 48 48 2600 28
60 60 60 60 2800 31
70 70 70 70 3100 34
85 85 85 85 3400 37
99 99 99 99 3800 40
104 104 104 104 3800 40
Throttling 50%: On= 99°C; OFF=88°C
OS shut down at 104°C; H/W shut down at 92°C