Si5351c pin descriptions (20-pin qfn, 24-pin qsop), S i 5 3 5 1 a / b / c – Silicon Laboratories SI5351A/B/C User Manual
Page 64
S i 5 3 5 1 A / B / C
64
Preliminary Rev. 0.95
11. Si5351C Pin Descriptions (20-Pin QFN, 24-Pin QSOP)
Table 12. Si5351C Pin Descriptions
Pin Name
Pin Number
Pin Type*
Function
20-QFN
24-QSOP
XA
1
6
I
Input pin for external crystal.
XB
2
7
I
Input pin for external crystal.
CLK0
13
21
O
Output clock 0.
CLK1
12
20
O
Output clock 1.
CLK2
9
15
O
Output clock 2.
CLK3
8
14
O
Output clock 3.
CLK4
19
3
O
Output clock 4.
CLK5
17
1
O
Output clock 5.
CLK6
16
24
O
Output clock 6.
CLK7
15
23
O
Output clock 7.
INTR
3
9
O
Interrupt pin. Open drain active low output, requires a pull-up
resistor greater than 1 k
SCL
4
10
I
I
2
C bus serial clock input. Pull-up to VDD core with 1 k
SDA
5
11
I/O
I
2
C bus serial data input. Pull-up to VDD core with 1 k
CLKIN
6
12
I
PLL clock input.
OEB
7
13
I
Output driver enable. Low = enabled, High = disabled.
VDD
20
4
P
Core voltage supply pin
VDDOA
11
18
P
Output voltage supply pin for CLK0 and CLK1. See 6.2
VDDOB
10
16
P
Output voltage supply pin for CLK2 and CLK3. See 6.2
VDDOC
18
2
P
Output voltage supply pin for CLK4 and CLK5. See 6.2
VDDOD
14
22
P
Output voltage supply pin for CLK6 and CLK7. See 6.2
GND
Center Pad
5, 8, 17, 19
P
Ground.
Notes:
1. I = Input, O = Output, P = Power.
2. Input pins are not internally pulled up.
1
2
3
4
5
6
7
8
9
10
15
14
13
12
11
20
19
18
17
16
XA
XB
INTR
SCL
SDA
OEB
CL
K3
CL
K
2
VDD
O
B
CL
K
IN
Si5351C 20-QFN
Top View
GND
PAD
CL
K
6
CL
K
5
VDD
O
C
CL
K
4
VD
D
VDDOA
CLK1
CLK0
VDDOD
CLK7
2
1
4
3
6
5
8
7
10
9
12
11
23
24
21
22
19
20
17
18
15
16
13
14
Si5351C 24-QSOP
Top View
VDDOC
CLK5
VDD
CLK4
XA
GND
GND
XB
SCL
INTR
CLKIN
SDA
CLK7
CLK6
CLK0
VDD0D
GND
CLK1
GND
VDDOA
CLK2
VDD0B
OEB
CLK3